| Phase change memory technology GW Burr, MJ Breitwisch, M Franceschini, D Garetto, K Gopalakrishnan, ... Journal of Vacuum Science & Technology B 28 (2), 223-262, 2010 | 1278 | 2010 |
| Access devices for 3D crosspoint memory GW Burr, RS Shenoy, K Virwani, P Narayanan, A Padilla, B Kurdi, ... Journal of Vacuum Science & Technology B 32 (4), 2014 | 426 | 2014 |
| Multi-bit-per-cell nvm structures and architecture A Padilla, TJ King US Patent App. 11/609,846, 2007 | 234 | 2007 |
| Feedback FET: A novel transistor exhibiting steep switching behavior at low bias voltages A Padilla, CW Yeung, C Shin, C Hu, TJK Liu 2008 IEEE International Electron Devices Meeting, 1-4, 2008 | 226 | 2008 |
| Nanoscale electronic synapses using phase change devices BL Jackson, B Rajendran, GS Corrado, M Breitwisch, GW Burr, R Cheek, ... ACM Journal on Emerging Technologies in Computing Systems (JETC) 9 (2), 1-20, 2013 | 197 | 2013 |
| Observation and modeling of polycrystalline grain formation in Ge2Sb2Te5 GW Burr, P Tchoulfian, T Topuria, C Nyffeler, K Virwani, A Padilla, ... Journal of Applied Physics 111 (10), 2012 | 85 | 2012 |
| Large-scale (512kbit) integration of multilayer-ready access-devices based on mixed-ionic-electronic-conduction (MIEC) at 100% yield GW Burr, K Virwani, RS Shenoy, A Padilla, M BrightSky, EA Joseph, ... 2012 Symposium on VLSI Technology (VLSIT), 41-42, 2012 | 84 | 2012 |
| MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays RS Shenoy, GW Burr, K Virwani, B Jackson, A Padilla, P Narayanan, ... Semiconductor Science and Technology 29 (10), 104005, 2014 | 75 | 2014 |
| Sub-30nm scaling and high-speed operation of fully-confined access-devices for 3D crosspoint memory based on mixed-ionic-electronic-conduction (MIEC) materials K Virwani, GW Burr, RS Shenoy, CT Rettner, A Padilla, T Topuria, ... 2012 International Electron Devices Meeting, 2.7. 1-2.7. 4, 2012 | 69 | 2012 |
| Voltage polarity effects in Ge2Sb2Te5-based phase change memory devices A Padilla, GW Burr, CT Rettner, T Topuria, PM Rice, B Jackson, K Virwani, ... Journal of Applied Physics 110 (5), 2011 | 68 | 2011 |
| Programming characteristics of the steep turn-on/off feedback FET (FBFET) CW Yeung, A Padilla, TJK Liu, C Hu 2009 Symposium on VLSI Technology, 176-177, 2009 | 60 | 2009 |
| Evidence of crystallization–induced segregation in the phase change material Te-rich GST A Debunne, K Virwani, A Padilla, GW Burr, AJ Kellock, VR Deline, ... Journal of The Electrochemical Society 158 (10), H965, 2011 | 56 | 2011 |
| Endurance and scaling trends of novel access-devices for multi-layer crosspoint-memory based on mixed-ionic-electronic-conduction (MIEC) materials RS Shenoy, K Gopalakrishnan, B Jackson, K Virwani, GW Burr, ... 2011 Symposium on VLSI Technology-Digest of Technical Papers, 94-95, 2011 | 42 | 2011 |
| Dual-bit SONOS FinFET Non-Volatile Memory Cell and New Method of Charge Detection A Padilla, TJK Liu 2007 International Symposium on VLSI Technology, Systems and Applications …, 2007 | 35 | 2007 |
| Exploring the design space for crossbar arrays built with mixed-ionic-electronic-conduction (MIEC) access devices P Narayanan, GW Burr, RS Shenoy, S Stephens, K Virwani, A Padilla, ... IEEE Journal of the Electron Devices Society 3 (5), 423-434, 2015 | 33 | 2015 |
| Voltage polarity effects in GST-based phase change memory: Physical origins and implications A Padilla, GW Burr, K Virwani, A Debunne, CT Rettner, T Topuria, ... 2010 International Electron Devices Meeting, 29.4. 1-29.4. 4, 2010 | 29 | 2010 |
| Recovery dynamics and fast (sub-50ns) read operation with access devices for 3D crosspoint memory based on mixed-ionic-electronic-conduction (MIEC) GW Burr, K Virwani, RS Shenoy, G Fraczak, CT Rettner, A Padilla, ... 2013 Symposium on VLSI Technology, T66-T67, 2013 | 24 | 2013 |
| The inner workings of phase change memory: Lessons from prototype PCM devices GW Burr, A Padilla, M Franceschini, B Jackson, DG Dupouy, CT Rettner, ... 2010 IEEE Globecom Workshops, 1890-1894, 2010 | 24 | 2010 |
| Enhanced endurance of dual-bit SONOS NVM cells using the GIDL read method A Padilla, S Lee, D Carlton, TJK Liu 2008 Symposium on VLSI Technology, 142-143, 2008 | 16 | 2008 |
| Filament confinement in reversible resistance-switching memory elements B Rajamohanan, J Saenz, A Padilla, M Purahmad, A Melik-Martirosian US Patent 9,805,793, 2017 | 12 | 2017 |