| Identification and classification of single-event upsets in the configuration memory of SRAM-based FPGAs M Ceschia, M Violante, MS Reorda, A Paccagnella, P Bernardi, ... IEEE Transactions on Nuclear Science 50 (6), 2088-2094, 2003 | 177 | 2003 |
| Evaluating the effects of SEUs affecting the configuration memory of an SRAM-based FPGA M Bellato, P Bernardi, D Bortolato, A Candelori, M Ceschia, ... Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 132 | 2004 |
| A new hybrid fault detection technique for systems-on-a-chip P Bernardi, LMV Bolzani, M Rebaudengo, MS Reorda, FL Vargas, ... IEEE transactions on Computers 55 (2), 185-198, 2006 | 100 | 2006 |
| A reliability analysis of a deep neural network A Bosio, P Bernardi, A Ruospo, E Sanchez 2019 IEEE Latin American Test Symposium (LATS), 1-6, 2019 | 96 | 2019 |
| Development flow for on-line core self-test of automotive microcontrollers P Bernardi, R Cantoro, S De Luca, E Sánchez, A Sansonetti IEEE Transactions on Computers 65 (3), 744-754, 2015 | 95 | 2015 |
| On the evaluation of SEU sensitiveness in SRAM-based FPGAs P Bernardi, MS Reorda, L Sterpone, M Violante Proceedings. 10th IEEE International On-Line Testing Symposium, 115-120, 2004 | 81 | 2004 |
| Simulation-based analysis of SEU effects in SRAM-based FPGAs M Violante, L Sterpone, M Ceschia, D Bortolato, P Bernardi, MS Reorda, ... IEEE Transactions on Nuclear Science 51 (6), 3354-3359, 2004 | 72 | 2004 |
| System-in-package testing: problems and solutions D Appello, P Bernardi, M Grosso, MS Reorda IEEE Design & Test of Computers 23 (3), 203-211, 2006 | 59 | 2006 |
| Exploiting programmable BIST for the diagnosis of embedded memory cores D Appello, P Bernardi, A Fudoli, M Rebaudengo, MS Reorda, V Tancorre, ... International Test Conference, 2003. Proceedings. ITC 2003., 379-379, 2003 | 53 | 2003 |
| Agri-food traceability management using a RFID system with privacy protection P Bernardi, C Demartini, F Gandino, B Montrucchio, M Rebaudengo, ... 21st International Conference on Advanced Information Networking and …, 2007 | 43 | 2007 |
| Exploring the mysteries of system-level test I Polian, J Anders, S Becker, P Bernardi, K Chakrabarty, N ElHamawy, ... 2020 IEEE 29th Asian Test Symposium (ATS), 1-6, 2020 | 41 | 2020 |
| On-line functionally untestable fault identification in embedded processor cores P Bernardi, M Bonazza, E Sánchez, MS Reorda, O Ballan 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013 | 40 | 2013 |
| Fault grading of software-based self-test procedures for dependable automotive applications P Bernardi, M Grosso, E Sánchez, O Ballan 2011 Design, Automation & Test in Europe, 1-2, 2011 | 37 | 2011 |
| An effective technique for the automatic generation of diagnosis-oriented programs for processor cores P Bernardi, EES Sánchez, M Schillaci, G Squillero, MS Reorda IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 36 | 2008 |
| An anti-counterfeit mechanism for the application layer in low-cost RFID devices P Bernardi, F Gandino, F Lamberti, B Montrucchio, M Rebaudengo, ... 2008 4th European Conference on Circuits and Systems for Communications, 227-231, 2008 | 33 | 2008 |
| Using infrastructure IPs to support SW-based self-test of processor cores P Bernardi, M Rebaudengo, S Reorda Fifth International Workshop on Microprocessor Test and Verification (MTV'04 …, 2004 | 33 | 2004 |
| An effective approach to automatic functional processor test generation for small-delay faults A Riefert, L Ciganda, M Sauer, P Bernardi, MS Reorda, B Becker 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 32 | 2014 |
| A programmable BIST for DRAM testing and diagnosis P Bernardi, M Grosso, MS Reorda, Y Zhang 2010 IEEE International Test Conference, 1-10, 2010 | 32 | 2010 |
| An effective technique for minimizing the cost of processor software-based diagnosis in SoCs P Bernardi, E Sánchez, M Schillaci, G Squillero, MS Reorda Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006 | 32 | 2006 |
| On the in-field functional testing of decode units in pipelined RISC processors P Bernardi, R Cantoro, L Ciganda, E Sánchez, MS Reorda, S De Luca, ... 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2014 | 31 | 2014 |