| A 28-GHz CMOS phased-array transceiver based on LO phase-shifting architecture with gain invariant phase tuning for 5G new radio J Pang, R Wu, Y Wang, M Dome, H Kato, H Huang, AT Narayanan, H Liu, ... IEEE Journal of Solid-State Circuits 54 (5), 1228-1242, 2019 | 200 | 2019 |
| A 39-GHz 64-element phased-array transceiver with built-in phase and amplitude calibrations for large-array 5G NR in 65-nm CMOS Y Wang, R Wu, J Pang, D You, AA Fadila, R Saengchan, X Fu, ... IEEE Journal of Solid-State Circuits 55 (5), 1249-1269, 2020 | 191 | 2020 |
| A 28-GHz CMOS phased-array beamformer utilizing neutralized bi-directional technique supporting dual-polarized MIMO for 5G NR J Pang, Z Li, R Kubozoe, X Luo, R Wu, Y Wang, D You, AA Fadila, ... IEEE Journal of Solid-State Circuits 55 (9), 2371-2386, 2020 | 184 | 2020 |
| 64-QAM 60-GHz CMOS transceivers for IEEE 802.11 ad/ay R Wu, R Minami, Y Tsukui, S Kawai, Y Seo, S Sato, K Kimura, S Kondo, ... IEEE Journal of Solid-State Circuits 52 (11), 2871-2891, 2017 | 156 | 2017 |
| A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q Imbalance J Pang, S Maki, S Kawai, N Nagashima, Y Seo, M Dome, H Kato, ... IEEE Journal of Solid-State Circuits 54 (5), 1375-1390, 2019 | 87 | 2019 |
| A CMOS dual-polarized phased-array beamformer utilizing cross-polarization leakage cancellation for 5G MIMO systems J Pang, Z Li, X Luo, J Alvin, R Saengchan, AA Fadila, K Yanagisawa, ... IEEE Journal of Solid-State Circuits 56 (4), 1310-1326, 2021 | 61 | 2021 |
| 13.6 A 42Gb/s 60GHz CMOS transceiver for IEEE 802.11 ay R Wu, S Kawai, Y Seo, N Fajri, K Kimura, S Sato, S Kondo, T Ueno, ... 2016 IEEE International Solid-State Circuits Conference (ISSCC), 248-249, 2016 | 57 | 2016 |
| A 60-GHz 3.0-Gb/s spectrum efficient BPOOK transceiver for low-power short-range wireless in 65-nm CMOS Y Wang, B Liu, R Wu, H Liu, AT Narayanan, J Pang, N Li, T Yoshioka, ... IEEE Journal of Solid-State Circuits 54 (5), 1363-1374, 2019 | 45 | 2019 |
| 24.9 A 128-QAM 60GHz CMOS transceiver for IEEE802. 11ay with calibration of LO feedthrough and I/Q imbalance J Pang, S Maki, S Kawai, N Nagashima, Y Seo, M Dome, H Kato, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 424-425, 2017 | 45 | 2017 |
| A 28GHz CMOS phased-array transceiver featuring gain invariance based on LO phase shifting architecture with 0.1-degree beam-steering resolution for 5G new radio J Pang, R Wu, Y Wang, M Dome, H Kato, H Huang, AT Narayanan, H Liu, ... 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 56-59, 2018 | 43 | 2018 |
| A Fully Synthesizable Fractional-N MDLL With Zero-Order Interpolation-Based DTC Nonlinearity Calibration and Two-Step Hybrid Phase Offset Calibration B Liu, Y Zhang, J Qiu, HC Ngo, W Deng, K Nakata, T Yoshioka, J Emmei, ... IEEE Transactions on Circuits and Systems I: Regular Papers 68 (2), 603-616, 2020 | 41 | 2020 |
| A 39GHz 64-element phased-array CMOS transceiver with built-in calibration for large-array 5G NR Y Wang, R Wu, J Pang, D You, AA Fadila, R Saengchan, X Fu, ... 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 279-282, 2019 | 40 | 2019 |
| A 28.16-Gb/s area-efficient 60-GHz CMOS bidirectional transceiver for IEEE 802.11 ay J Pang, KK Tokgoz, S Maki, Z Li, X Luo, I Abdo, S Kawai, H Liu, Z Sun, ... IEEE transactions on microwave theory and techniques 68 (1), 252-263, 2019 | 28 | 2019 |
| A fully-synthesizable fractional-N injection-locked PLL for digital clocking with triangle/sawtooth spread-spectrum modulation capability in 5-nm CMOS B Liu, Y Zhang, J Qiu, H Huang, Z Sun, D Xu, H Zhang, Y Wang, J Pang, ... IEEE Solid-State Circuits Letters 3, 34-37, 2020 | 27 | 2020 |
| A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal Y Wang, D You, X Fu, T Nakamura, AA Fadila, T Someya, A Kawaguchi, ... IEEE Journal of Solid-State Circuits 57 (2), 356-370, 2021 | 25 | 2021 |
| 0.2mW 70Fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur H Zhang, AT Narayanan, H Herdian, B Liu, Y Wang, A Shirane, K Okada 2019 Symposium on VLSI Circuits, C38-C39, 2019 | 25 | 2019 |
| A 1.2 ps-jitter fully-synthesizable fully-calibrated fractional-N injection-locked PLL using true arbitrary nonlinearity calibration technique B Liu, HC Ngo, K Nakata, W Deng, Y Zhang, J Qiu, T Yoshioka, J Emmei, ... 2018 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2018 | 24 | 2018 |
| 32.7 A 32kHz-Reference 2.4 GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth J Qiu, Z Sun, B Liu, W Wang, D Xu, H Herdian, H Huang, Y Zhang, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 454-456, 2021 | 19 | 2021 |
| A 28-GHz CMOS phased-array beamformer supporting dual-polarized MIMO with cross-polarization leakage cancellation J Pang, Z Li, X Luo, J Alvin, R Saengchan, AA Fadila, K Yanagisawa, ... 2020 IEEE Symposium on VLSI Circuits, 1-2, 2020 | 18 | 2020 |
| An HDL-described fully-synthesizable sub-GHz IoT transceiver with ring oscillator based frequency synthesizer and digital background EVM calibration B Liu, Y Zhang, J Qiu, W Deng, Z Xu, H Zhang, J Pang, Y Wang, R Wu, ... 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019 | 17 | 2019 |
Kenichi OkadaInstitute of Science Tokyo (formerly Tokyo Institute of Technology)Email verificata su ee.e.titech.ac.jp