A cubic-millimeter energy-autonomous wireless intraocular pressure monitor G Chen, H Ghaed, R Haque, M Wieckowski, Y Kim, G Kim, D Fick, D Kim, ...
2011 IEEE International Solid-State Circuits Conference, 310-312, 2011
274 2011 Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells G Chen, M Fojtik, D Kim, D Fick, J Park, M Seok, MT Chen, Z Foo, ...
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 288-289, 2010
266 2010 A low-voltage processor for sensing applications with picowatt standby mode S Hanson, M Seok, YS Lin, ZY Foo, D Kim, Y Lee, N Liu, D Sylvester, ...
IEEE Journal of Solid-State Circuits 44 (4), 1145-1155, 2009
224 2009 The Phoenix Processor: A 30pW platform for sensor applications M Seok, S Hanson, YS Lin, Z Foo, D Kim, Y Lee, N Liu, D Sylvester, ...
2008 IEEE Symposium on VLSI Circuits, 188-189, 2008
217 2008 Circuits for a cubic-millimeter energy-autonomous wireless intraocular pressure monitor MH Ghaed, G Chen, R Haque, M Wieckowski, Y Kim, G Kim, Y Lee, I Lee, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 60 (12), 3152-3162, 2013
139 2013 A millimeter-scale energy-autonomous sensor system with stacked battery and solar cells M Fojtik, D Kim, G Chen, YS Lin, D Fick, J Park, M Seok, MT Chen, Z Foo, ...
IEEE Journal of Solid-State Circuits 48 (3), 801-813, 2013
130 2013 Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores D Fick, RG Dreslinski, B Giridhar, G Kim, S Seo, M Fojtik, S Satpathy, ...
2012 IEEE International Solid-State Circuits Conference, 190-192, 2012
116 2012 Low power circuit design based on heterojunction tunneling transistors (HETTs) D Kim, Y Lee, J Cai, I Lauer, L Chang, SJ Koester, D Sylvester, D Blaauw
Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009
104 2009 A 23.6-Mb/mm Z Guo, D Kim, S Nalam, J Wiedemer, X Wang, E Karl
IEEE Journal of Solid-State Circuits 54 (1), 210-216, 2018
69 2018 17.1 a 0.6 v 1.5 ghz 84mb sram design in 14nm finfet cmos technology E Karl, Z Guo, JW Conary, JL Miller, YG Ng, S Nalam, D Kim, J Keane, ...
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
63 2015 Centip3De: A cluster-based NTC architecture with 64 ARM Cortex-M3 cores in 3D stacked 130 nm CMOS D Fick, RG Dreslinski, B Giridhar, G Kim, S Seo, M Fojtik, S Satpathy, ...
IEEE Journal of Solid-State Circuits 48 (1), 104-117, 2012
63 2012 Centip3De: A 64-core, 3D stacked near-threshold system RG Dreslinski, D Fick, B Giridhar, G Kim, S Seo, M Fojtik, S Satpathy, ...
IEEE Micro 33 (2), 8-16, 2013
58 2013 A 0.6 V, 1.5 GHz 84 Mb SRAM in 14 nm FinFET CMOS technology with capacitive charge-sharing write assist circuitry E Karl, Z Guo, J Conary, J Miller, YG Ng, S Nalam, D Kim, J Keane, ...
IEEE Journal of Solid-State Circuits 51 (1), 222-229, 2015
54 2015 A 1.85 fW/bit ultra low leakage 10T SRAM with speed compensation scheme D Kim, G Chen, M Fojtik, M Seok, D Blaauw, D Sylvester
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 69-72, 2011
52 2011 Variation-aware static and dynamic writability analysis for voltage-scaled bit-interleaved 8-T SRAMs D Kim, V Chandra, R Aitken, D Blaauw, D Sylvester
IEEE/ACM International Symposium on Low Power Electronics and Design, 145-150, 2011
34 2011 Memory device and method of controlling a write operation within a memory device V Chandra, D Kim
US Patent 8,363,484, 2013
16 2013 Centip3De: a many-core prototype exploring 3D integration and near-threshold computing RG Dreslinski, D Fick, B Giridhar, G Kim, S Seo, M Fojtik, S Satpathy, ...
Communications of the ACM 56 (11), 97-104, 2013
13 2013 A dense 45nm half-differential SRAM with lower minimum operating voltage G Chen, M Wieckowski, D Kim, D Blaauw, D Sylvester
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 57-60, 2011
11 2011 A 128kb high density portless SRAM using hierarchical bitlines and thyristor sense amplifiers M Wieckowski, GK Chen, D Kim, D Blaauw, D Sylvester
Quality Electronic Design (ISQED), 2011 12th International Symposium on, 1-4, 2011
10 2011 10-nm SRAM Design Using Gate-Modulated Self-Collapse Write-Assist Enabling 175-mV V MIN Reduction With Negligible Active Power Overhead Z Guo, J Wiedemer, Y Kim, PS Ramamoorthy, PB Sathyaprasad, ...
IEEE Solid-State Circuits Letters 4, 6-9, 2020
8 2020 