Leakage power analysis attacks: A novel class of attacks to nanometer cryptographic circuits M Alioto, L Giancane, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (2), 355-367, 2009
157 2009 Effectiveness of leakage power analysis attacks on DPA-resistant logic styles under process variations M Alioto, S Bongiovanni, M Djukanovic, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (2), 429-442, 2013
86 2013 0.9-V Class-AB Miller OTA in 0.35- AD Grasso, S Pennisi, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (7), 1740-1747, 2017
74 2017 A novel ultra-compact FPGA-compatible TRNG architecture exploiting latched ring oscillators R Della Sala, D Bellizia, G Scotti
IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 1672-1676, 2021
67 2021 The VCG-CCII: a novel building block and its application to capacitance multiplication A De Marcellis, G Ferri, NC Guerrini, G Scotti, V Stornelli, A Trifiletti
Analog Integrated Circuits and Signal Processing 58, 55-59, 2009
65 2009 Delay-based dual-rail precharge logic M Bucci, L Giancane, R Luzzi, G Scotti, A Trifiletti
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (7 …, 2010
64 2010 Design solutions for sample-and-hold circuits in CMOS nanometer technologies F Centurelli, P Monsurro, S Pennisi, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 56 (6), 459-463, 2009
64 2009 Analysis of data dependence of leakage current in CMOS cryptographic hardware J Giorgetti, G Scotti, A Simonetti, A Trifiletti
Proceedings of the 17th ACM Great Lakes symposium on VLSI, 78-83, 2007
52 2007 Linearization technique for source-degenerated CMOS differential transconductors P Monsurro, S Pennisi, G Scotti, A Trifiletti
IEEE Transactions on Circuits and Systems II: Express Briefs 54 (10), 848-852, 2007
51 2007 A novel yield optimization technique for digital CMOS circuits design by means of process parameters run-time estimation and body bias active control M Olivieri, G Scotti, A Trifiletti
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (5), 630-638, 2005
51 2005 A novel low-voltage low-power fully differential voltage and current gained CCII for floating impedance simulations A De Marcellis, G Ferri, NC Guerrini, G Scotti, V Stornelli, A Trifiletti
Microelectronics Journal 40 (1), 20-25, 2009
48 2009 88- G Scotti, S Pennisi, P Monsurrò, A Trifiletti
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (7), 1905-1916, 2014
47 2014 Design of low-voltage high-speed CML D-latches in nanometer CMOS technologies G Scotti, D Bellizia, A Trifiletti, G Palumbo
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (12 …, 2017
46 2017 0.9‐V CMOS cascode amplifier with body‐driven gain boosting P Monsurro, S Pennisi, G Scotti, A Trifiletti
International Journal of Circuit Theory and Applications 37 (2), 193-202, 2009
42 2009 High-throughput FPGA-compatible TRNG architecture exploiting multistimuli metastable cells R Della Sala, D Bellizia, G Scotti
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (12), 4886-4897, 2022
41 2022 Secure double rate registers as an RTL countermeasure against power analysis attacks D Bellizia, S Bongiovanni, P Monsurrò, G Scotti, A Trifiletti, FB Trotta
IEEE transactions on very large scale integration (vlsi) systems 26 (7 …, 2018
41 2018 Exploiting the body of MOS devices for high performance analog design P Monsurro, S Pennisi, G Scotti, A Trifiletti
IEEE Circuits and Systems Magazine 11 (4), 8-23, 2011
41 2011 Side channel analysis resistant design flow M Aigner, S Mangard, F Menichelli, R Menicocci, M Olivieri, T Popp, ...
2006 IEEE International Symposium on Circuits and Systems, 4 pp.-2912, 2006
38 2006 A lightweight FPGA compatible weak-PUF primitive based on XOR gates R Della Sala, D Bellizia, G Scotti
IEEE Transactions on Circuits and Systems II: Express Briefs 69 (6), 2972-2976, 2022
37 2022 Current controlled current conveyor (CCCII) and application using 65nm CMOS technology Z Abbas, G Scotti, M Olivieri
World Academy of Science, Engineering and Technology 55, 935-939, 2011
37 2011 
Alessandro TrifilettiProfessore ordinario di Elettronica, Università degli Studi di Roma "La Sapienza"Email yang diverifikasi di uniroma1.it