| Implementing asynchronous circuits on LUT based FPGAs QT Ho, JB Rigaud, L Fesquet, M Renaudin, R Rolland Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002 | 112 | 2002 |
| Strengthening hardware AES implementations against fault attacks M Joye, P Manet, JB Rigaud IET Information Security 1 (3), 106-110, 2007 | 100 | 2007 |
| A side-channel and fault-attack resistant AES circuit working on duplicated complemented values M Doulcier-Verdier, JM Dutertre, J Fournier, JB Rigaud, B Robisson, ... 2011 IEEE International Solid-State Circuits Conference, 274-276, 2011 | 82 | 2011 |
| Laser-induced single-bit faults in flash memory: Instructions corruption on a 32-bit microcontroller B Colombier, A Menu, JM Dutertre, PA Moëllic, JB Rigaud, JL Danger 2019 IEEE International Symposium on Hardware Oriented Security and Trust …, 2019 | 79 | 2019 |
| Hardware Trojan detection by delay and electromagnetic measurements XT Ngo, I Exurville, S Bhasin, JL Danger, S Guilley, Z Najm, JB Rigaud, ... 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 782-787, 2015 | 66 | 2015 |
| Hardware engines for bus encryption: a survey of existing techniques R Elbaz, L Torres, G Sassatelli, P Guillemin, C Anguille, C Buatois, ... Design, Automation and Test in Europe, 40-45, 2005 | 63 | 2005 |
| Power supply glitch attacks: Design and evaluation of detection circuits K Gomina, JB Rigaud, P Gendrier, P Candelier, A Tria 2014 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2014 | 45 | 2014 |
| A fully-digital EM pulse detector D El-Baze, JB Rigaud, P Maurine 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 439-444, 2016 | 44 | 2016 |
| Static implementation of QDI asynchronous primitives P Maurine, JB Rigaud, F Bouesse, G Sicard, M Renaudin International Workshop on Power and Timing Modeling, Optimization and …, 2003 | 43 | 2003 |
| Resilient hardware Trojans detection based on path delay measurements I Exurville, L Zussa, JB Rigaud, B Robisson 2015 IEEE International Symposium on Hardware Oriented Security and Trust …, 2015 | 42 | 2015 |
| Experimental analysis of the laser-induced instruction skip fault model JM Dutertre, T Riom, O Potin, JB Rigaud Secure IT Systems: 24th Nordic Conference, NordSec 2019, Aalborg, Denmark …, 2019 | 40 | 2019 |
| Review of fault injection mechanisms and consequences on countermeasures design JM Dutertre, JJA Fournier, AP Mirbaha, D Naccache, JB Rigaud, ... 2011 6th International Conference on Design & Technology of Integrated …, 2011 | 39 | 2011 |
| Precise spatio-temporal electromagnetic fault injections on data transfers A Menu, S Bhasin, JM Dutertre, JB Rigaud, JL Danger 2019 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), 1-8, 2019 | 38 | 2019 |
| Voltage glitch attacks on mixed-signal systems N Beringuier-Boher, K Gomina, D Hély, JB Rigaud, V Beroulle, A Tria, ... 2014 17th Euromicro Conference on Digital System Design, 379-386, 2014 | 38 | 2014 |
| Experimental analysis of the electromagnetic instruction skip fault model A Menu, JM Dutertre, O Potin, JB Rigaud, JL Danger 2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 1-7, 2020 | 33 | 2020 |
| An embedded digital sensor against EM and BB fault injection D El-Baze, JB Rigaud, P Maurine 2016 Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), 78-86, 2016 | 32 | 2016 |
| Body biasing injection attacks in practice N Beringuier-Boher, M Lacruche, D El-Baze, JM Dutertre, JB Rigaud, ... Proceedings of the Third Workshop on Cryptography and Security in Computing …, 2016 | 32 | 2016 |
| Laser fault injection into sram cells: Picosecond versus nanosecond pulses M Lacruche, N Borrel, C Champeix, C Roscian, A Sarafianos, JB Rigaud, ... 2015 IEEE 21st International On-Line Testing Symposium (IOLTS), 13-18, 2015 | 32 | 2015 |
| A scalable and systolic architectures of montgomery modular multiplication for public key cryptosystems based on dsps A Mrabet, N El-Mrabet, R Lashermes, JB Rigaud, B Bouallegue, ... Journal of Hardware and Systems Security 1, 219-236, 2017 | 28 | 2017 |
| Design and characterisation of an AES chip embedding countermeasures M Agoyan, S Bouquet, J Fournier, B Robisson, A Tria, JM Dutertre, ... International Journal of Intelligent Engineering Informatics 1 (3-4), 328-347, 2011 | 27 | 2011 |
Jean-Max DutertreProfessor, Microelectronic, Ecole Nationale Supérieure des Mines de Saint-EtienneEmail yang diverifikasi di emse.fr