SleepWalker: A 25-MHz 0.4-V Sub- D Bol, J De Vos, C Hocquet, F Botman, F Durvaux, S Boyd, D Flandre, ...
IEEE Journal of Solid-State Circuits 48 (1), 20-32, 2012
183 2012 Green SoCs for a sustainable Internet-of-Things D Bol, J De Vos, F Botman, G de Streel, S Bernard, D Flandre, JD Legat
2013 IEEE Faible Tension Faible Consommation, 1-4, 2013
71 2013 A 25MHz 7μW/MHz ultra-low-voltage microcontroller SoC in 65nm LP/GP CMOS for low-carbon wireless sensor nodes D Bol, J De Vos, C Hocquet, F Botman, F Durvaux, S Boyd, D Flandre, ...
2012 IEEE International Solid-State Circuits Conference, 490-492, 2012
57 2012 8.4 a 0.33 v/-40 c process/temperature closed-loop compensation soc embedding all-digital clock multiplier and dc-dc converter exploiting fdsoi 28nm back-gate biasing S Clerc, M Saligane, F Abouzeid, M Cochet, JM Daveau, C Bottoni, D Bol, ...
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
54 2015 A sizing methodology for on-chip switched-capacitor DC/DC converters J De Vos, D Flandre, D Bol
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (5), 1597-1606, 2013
42 2013 Bellevue: A 50MHz variable-width SIMD 32bit microcontroller at 0.37 V for processing-intensive wireless sensor nodes F Botman, J De Vos, S Bernard, F Stas, JD Legat, D Bol
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 1207-1210, 2014
41 2014 A 0.48mm2 5μW-10mW indoor/outdoor PV energy-harvesting management unit in a 65nm SoC based on a single bidirectional multi-gain/multi-mode switched-cap … D Bol, EH Boufouss, D Flandre, J De Vos
ESSCIRC Conference 2015-41st European Solid-State Circuits Conference …, 2015
25 2015 Building ultra-low-power high-temperature digital circuits in standard high-performance SOI technology D Bol, J De Vos, R Ambroise, D Flandre, JD Legat
Solid-State Electronics 52 (12), 1939-1945, 2008
17 2008 Quasi-double gate regime to boost UTBB SOI MOSFET performance in analog and sleep transistor applications V Kilchytska, D Bol, J De Vos, F Andrieu, D Flandre
Solid-state electronics 84, 28-37, 2013
15 2013 Sceaux du musée d'Adana. Groupe du" Joueur de lyre"(VIIIe siècle av. J.-C)-Sceaux en verre et cachets anépigraphes d'époque achéménide-Scaraboïdes inscrits-Scarabées et sceaux … H Poncy, O Casabonne, J De Vos, M Egetmeyer, R Lebrun, A Lemaire
Anatolia antiqua. Eski Anadolu 9 (1), 9-37, 2001
15 2001 A dual-mode DC/DC converter for ultra-low-voltage microcontrollers J De Vos, D Flandre, D Bol
2012 IEEE Subthreshold Microelectronics Conference (SubVT), 1-3, 2012
12 2012 À propos de l'inscription bilingue de l'ensemble sculptural de Çineköy R Lebrun, J De Vos
Anatolia antiqua. Eski Anadolu 14 (1), 45-64, 2006
12 2006 Quasi-double gate mode for sleep transistors in UTBB FD SOI low-power high-speed applications D Bol, V Kilchytska, J De Vos, F Andrieu, D Flandre
2012 IEEE International SOI Conference (SOI), 1-2, 2012
11 2012 À propos des Aegyptiaca d'Asie Mineure datés du IIe millénaire av. J.-C J De Vos
Hethitica 15, 43-63, 2002
8 2002 Switched-capacitor DC/DC converters for empowering Internet-of-Things SoCs J De Vos, D Flandre, D Bol
2014 IEEE Faible Tension Faible Consommation, 1-4, 2014
7 2014 Pushing adaptive voltage scaling fully on chip J De Vos, D Flandre, D Bol
Journal of Low Power Electronics 8 (1), 95-105, 2012
7 2012 Dual-mode switched-capacitor DC-DC converter for subthreshold processors with deep sleep mode J De Vos, D Bol, D Flandre
Fringe poster session, 2010
7 2010 Cypre, Rhodes et l’Anatolie méridionale: la question ionienne OC Casabonne-De Vos, J De Vos
Res Antiquae 2, 83-102, 2005
7 2005 Power management integrated circuit for energy harvesting with primary battery input J De Vos, G Gosset, C Hocquet
US Patent 11,277,018, 2022
6 2022 A 65nm 1V to 0.5 V linear regulator with ultra low quiescent current for mixed-signal ULV SoCs G de Streel, J De Vos, D Flandre, D Bol
2014 IEEE Faible Tension Faible Consommation, 1-4, 2014
6 2014 