| A new architecture for FPGA based implementation of conversion of binary to double base number system (DBNS) using parallel search technique S Singha, A Ghosh, A Sinha ACM SIGARCH computer architecture news 39 (5), 12-18, 2012 | 9 | 2012 |
| " Floating point RNS" a new concept for designing the MAC unit of digital signal processor A Ghosh, S Singha, A Sinha ACM SIGARCH computer architecture news 40 (2), 39-43, 2012 | 8 | 2012 |
| Comparative performance analysis of FPGA based MAC unit using non-conventional number system in TVL domain for signal processing algorithm A Ghosh, A Sinha International Journal of Nanoparticles 12 (1-2), 50-58, 2020 | 6 | 2020 |
| FPGA Implementation of RNS Adder Based MAC Unit in Ternary Value Logic Domain for Signal Processing Algorithm and its Performance Analysis A Ghosh, A Sinha EDKCON 2018 IEEE Electron Device Kolkata Conference, 182-187, 2018 | 6 | 2018 |
| FPGA Implementation of MAC Unit for Double Base Ternary Number System (DBTNS) and its Performance Analysis A Ghosh, A Sinha International Journal of Computer Applications 181 (14), 9-22, 2018 | 4 | 2018 |
| A Novel Architecture of Mixed Number System MAC Unit for Digital signal Processors A Ghosh, S Singha, A Sinha ARCHITECTURE 1 (c2), c3, 2010 | 3 | 2010 |
| FPGA based MAC units for signal processing algorithms with non-binary numeral system: an effective analysis A Ghosh, S Chakraborty, A Sinha Applications of Machine intelligence in Engineering, 257-263, 2022 | 1 | 2022 |
| Classification of Breast Cancer Using Deep CNN: A Comparative Analysis S Sarkar, S Chakraborty, L Bhowmik, R Paul, A Ghosh International Conference on Recent Advances in Artificial Intelligence …, 2023 | | 2023 |
| Investigation on different performance parameters under variable data rate conditions in the presence of dispersion compensation of cost-effective optical transport network S Chakraborty, A Ghosh AIP Conference Proceedings 2576 (1), 2022 | | 2022 |
| Comparative performance analysis of Mixed Number System based MAC unit in various logic domain for signal processing algorithm A Ghosh, S Chakraborty, A Sinha 2019 International Conference on Ubiquitous and Emerging Concepts on Sensors …, 2019 | | 2019 |
| Performance Analysis of FPGA Based MAC Unit using DBTNS Multiplier & TRNS Adder for Signal Processing Algorithm A Ghosh, A Sinha European Journal of Applied Sciences 6 (5), 31-43, 2018 | | 2018 |
