| Architecture and CAD for deep-submicron FPGAs V Betz, J Rose, A Marquardt Springer Science & Business Media, 2012 | 1820 | 2012 |
| VPR: A new packing, placement and routing tool for FPGA research V Betz, J Rose International Workshop on Field Programmable Logic and Applications, 213-222, 1997 | 1596 | 1997 |
| VTR 7.0: Next generation architecture and CAD system for FPGAs J Luu, J Goeders, M Wainberg, A Somerville, T Yu, K Nasartschuk, M Nasr, ... ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2), 1-30, 2014 | 488 | 2014 |
| Timing-driven placement for FPGAs A Marquardt, V Betz, J Rose Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000 | 370 | 2000 |
| Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density A Marquardt, V Betz, J Rose Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999 | 366 | 1999 |
| VTR 8: High-performance CAD and customizable FPGA architecture modelling KE Murray, O Petelin, S Zhong, JM Wang, M Eldafrawy, JP Legault, E Sha, ... ACM Transactions on Reconfigurable Technology and Systems (TRETS) 13 (2), 1-55, 2020 | 266 | 2020 |
| The Stratix II logic and routing architecture D Lewis, E Ahmed, G Baeckler, V Betz, M Bourgeault, D Cashman, ... Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005 | 266 | 2005 |
| FPGA routing architecture: Segmentation and buffering to optimize speed and density V Betz, J Rose Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999 | 252 | 1999 |
| Cluster-based logic blocks for FPGAs: Area-efficiency vs. input sharing and size V Betz, J Rose Proceedings of CICC 97-Custom Integrated Circuits Conference, 551-554, 1997 | 214 | 1997 |
| EDA for IC implementation, circuit design, and process technology L Lavagno, L Scheffer, G Martin CRC, 2006 | 202* | 2006 |
| FPGA architecture: Principles and progression A Boutros, V Betz IEEE Circuits and Systems Magazine 21 (2), 4-29, 2021 | 172 | 2021 |
| The stratix routing and logic architecture D Lewis, V Betz, D Jefferson, A Lee, C Lane, P Leventis, S Marquardt, ... Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field …, 2003 | 171 | 2003 |
| A fast routability-driven router for FPGAs JS Swartz, V Betz, J Rose Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field …, 1998 | 167 | 1998 |
| How much logic should go in an FPGA logic block V Betz, J Rose IEEE Design & Test of Computers 15 (1), 10-15, 1998 | 164 | 1998 |
| Comparing fpga vs. custom cmos and the impact on processor microarchitecture H Wong, V Betz, J Rose Proceedings of the 19th ACM/SIGDA international symposium on Field …, 2011 | 157 | 2011 |
| Titan: Enabling large and complex benchmarks in academic cad KE Murray, S Whitty, S Liu, J Luu, V Betz 2013 23rd International Conference on Field programmable Logic and …, 2013 | 149 | 2013 |
| The Stratix-II Routing and Logic Architecture D Lewis, V Betz, D Jefferson, A Lee, C Lane, P Leventis, S Marquardt, ... Proceedings of the 2005 ACM/SIGDA 13th International Symposium on Field …, 2005 | 142 | 2005 |
| Directional bias and non-uniformity in FPGA global routing architectures V Betz, J Rose Proceedings of International Conference on Computer Aided Design, 652-659, 1996 | 137 | 1996 |
| Speed and area tradeoffs in cluster-based FPGA architectures A Marquardt, V Betz, J Rose IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (1), 84-93, 2000 | 133 | 2000 |
| Timing-driven titan: Enabling large benchmarks and exploring the gap between academic and commercial CAD KE Murray, S Whitty, S Liu, J Luu, V Betz ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (2), 1-18, 2015 | 128 | 2015 |
Jonathan RoseProfessor of Electrical and Computer Engineering, University of TorontoAdresse e-mail validée de ece.utoronto.ca