| Brainy: effective selection of data structures C Jung, S Rus, BP Railing, N Clark, S Pande ACM SIGPLAN Notices 46 (6), 86-97, 2011 | 100 | 2011 |
| Processor Interrupt Selection BP Railing, BL Worthington US Patent App. 12/163,057, 2008 | 54 | 2008 |
| Contech: Efficiently generating dynamic task graphs for arbitrary parallel programs BP Railing, ER Hein, TM Conte ACM Transactions on Architecture and Code Optimization (TACO) 12 (2), 1-24, 2015 | 26 | 2015 |
| Interrupt redirection with coalescing BL Worthington, G Marinkovic, B Railing, Q Zhang, SV Kavalanekar US Patent 7,788,435, 2010 | 25 | 2010 |
| Parallel pattern detection for architectural improvements JA Poovey, BP Railing, TM Conte Proceedings of the 3rd USENIX Workshop on Hot Topics in Parallelism (HotPar …, 2011 | 10 | 2011 |
| Efficient interrupt message definition B Worthington, V Mamtani, B Railing US Patent 7,783,811, 2010 | 10 | 2010 |
| How Can We Make Office Hours Better? K Lin, B Railing Proceedings of the 51st ACM Technical Symposium on Computer Science …, 2020 | 3 | 2020 |
| Implementing Malloc: Students and Systems Programming BP Railing, RE Bryant | 3 | 2018 |
| Processor interrupt determination BP Railing, BL Worthington US Patent 8,024,504, 2011 | 3 | 2011 |
| Dynamically Reconfiguring Multi-Core Architectures using Task Graph based Analysis S Srikanth, BP Railing, TM Conte The 26th International Conference on Parallel Architectures and Compilation …, 2015 | 2* | 2015 |
| Contech: A Tool for Analyzing Parallel Programs BP Railing, ER Hein, P Vassenko, TM Conte Georgia Institute of Technology, 2013 | 2 | 2013 |
| Using Active Learning Techniques in Mixed Undergraduate/Graduate Courses BP Railing Proceedings of the 46th ACM Technical Symposium on Computer Science …, 2015 | 1 | 2015 |
| Extrapolation Pitfalls When Evaluating Limited Endurance Memory RA Bheda, JG Beu, BP Railing, TM Conte 2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation …, 2012 | 1 | 2012 |
| CADSS: Computer Architecture Design Simulator for Students BP Railing Proceedings of the Workshop on Computer Architecture Education, 34-40, 2023 | | 2023 |
| Exam Time: How Students Spend Their Time When Taking Exams BP Railing Proceedings of the 53rd ACM Technical Symposium on Computer Science …, 2022 | | 2022 |
| Active Learning in Systems Courses BP Railing, C Taylor, S Garcia Proceedings of the 49th ACM Technical Symposium on Computer Science …, 2018 | | 2018 |
| Improving LLVM Instrumentation Overheads BP Railing LLVM Performance Workshop at CGO, 2017 | | 2017 |
| Collecting and Representing Parallel Programs with High Performance Instrumentation BP Railing Georgia Institute of Technology, 2015 | | 2015 |
| Contech: Parallel Program Representation and High Performance Instrumentation BP Railing Proceedings of the International Conference for High Performance Computing …, 2015 | | 2015 |
| Data Classification and Relaxing Storage Requirements B Railing | | 2004 |
Tom ConteAssociate Dean for Research, College of Computing; Professor of CS and ECE, Georgia Institute ofAdresse e-mail validée de gatech.edu