| Comprehensive and accurate analysis of the working principle in ferroelectric tunnel junctions using low-frequency noise spectroscopy W Shin, KK Min, JH Bae, J Yim, D Kwon, Y Kim, J Yu, J Hwang, BG Park, ... Nanoscale 14 (6), 2177-2185, 2022 | 34 | 2022 |
| Spiking neural networks with time-to-first-spike coding using TFT-type synaptic device model S Oh, S Lee, SY Woo, D Kwon, J Im, J Hwang, JH Bae, BG Park, JH Lee IEEE Access 9, 78098-78107, 2021 | 12 | 2021 |
| Highly efficient self-curing method in MOSFET using parasitic bipolar junction transistor W Shin, RH Koo, S Hong, D Kwon, J Hwang, BG Park, JH Lee IEEE Electron Device Letters 43 (7), 1001-1004, 2022 | 10 | 2022 |
| Reconfigurable neuromorphic computing block through integration of flash synapse arrays and super-steep neurons D Kwon, SY Woo, KH Lee, J Hwang, H Kim, SH Park, W Shin, JH Bae, ... Science advances 9 (29), eadg9123, 2023 | 9 | 2023 |
| Retention improvement in vertical NAND flash memory using 1-bit soft erase scheme and its effects on neural networks SH Park, D Kwon, HN Yoo, JW Back, J Hwang, Y Yang, JJ Kim, JH Lee 2022 International Electron Devices Meeting (IEDM), 5.5. 1-5.5. 4, 2022 | 9 | 2022 |
| Analog Synaptic Devices Based on IGZO Thin‐Film Transistors with a Metal–Ferroelectric–Metal–Insulator–Semiconductor Structure for High‐Performance Neuromorphic Systems D Kwon, EC Park, W Shin, RH Koo, J Hwang, JH Bae, D Kwon, JH Lee Advanced Intelligent Systems 5 (12), 2300125, 2023 | 8 | 2023 |
| Cointegration of the TFT-type AND flash synaptic array and CMOS circuits for a hardware-based neural network MK Park, WM Kang, RH Koo, JH Kim, J Hwang, JH Bae, JJ Kim, JH Lee IEEE Transactions on Electron Devices 70 (1), 93-98, 2022 | 8 | 2022 |
| CMOS-compatible low-power gated diode synaptic device for Hardware-based neural network MK Park, HN Yoo, J Hwang, SY Woo, D Kwon, YT Seo, JH Lee, JH Bae IEEE Transactions on Electron Devices 69 (2), 832-837, 2021 | 6 | 2021 |
| Direct Gradient Calculation: Simple and Variation‐Tolerant On‐Chip Training Method for Neural Networks H Kim, J Hwang, D Kwon, J Kim, MK Park, J Im, BG Park, JH Lee Advanced Intelligent Systems 3 (8), 2100064, 2021 | 6 | 2021 |
| Si‐Based Dual‐Gate Field‐Effect Transistor Array for Low‐Power On‐Chip Trainable Hardware Neural Networks KH Lee, D Kwon, IS Lee, J Hwang, J Im, JH Bae, WY Choi, SY Woo, ... Advanced Intelligent Systems 6 (1), 2300490, 2024 | 3 | 2024 |
| Accurate SPICE model for cells with tube-type poly-si channel in cell strings of vertical NAND flash memory J Hwang, HN Yoo, KH Lee, JW Back, MK Park, Y Yang, WY Choi, JH Lee IEEE Transactions on Electron Devices, 2023 | 3 | 2023 |
| Super-steep synapses based on positive feedback devices for reliable binary neural networks D Kwon, H Kim, KH Lee, J Hwang, W Shin, JH Bae, SY Woo, JH Lee Applied Physics Letters 122 (10), 2023 | 3 | 2023 |
| First Demonstration of Innovative 3D AND-Type Fully-Parallel Convolution Block with Ultra-High Area-and Energy-Efficiency J Kim, J Im, J Ko, S Lee, D Kwon, W Shin, J Hwang, RH Koo, WY Choi, ... 2023 International Electron Devices Meeting (IEDM), 1-4, 2023 | 2 | 2023 |
| Hardware-based ternary neural network using AND-type poly-Si TFT array and its optimization guideline D Kwon, MK Park, WM Kang, J Hwang, RH Koo, JH Bae, JH Lee IEEE Transactions on Electron Devices, 2023 | 2 | 2023 |
| CRUS: A hardware-efficient algorithm mitigating highly nonlinear weight update in CIM crossbar arrays for artificial neural networks J Lee, J Hwang, Y Cho, MK Park, WY Choi, S Kim, JH Lee IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 8 …, 2022 | 2 | 2022 |
| Utilization of unsigned inputs for NAND flash-based parallel and high-density synaptic architecture in binary neural networks ST Lee, G Yeom, J Hwang, H Kim, H Yoo, BG Park, JH Lee IEEE Journal of the Electron Devices Society 9, 1049-1054, 2021 | 2 | 2021 |
| Vertical AND-type Flash TFT Array Capable of Accurate Vector-Matrix Multiplication Operations for Hardware Neural Networks J Im, J Kim, J Hwang, M Park, RH Koo, J Ko, SH Park, WY Choi, JH Lee IEEE Electron Device Letters, 2024 | 1 | 2024 |
| On‐Chip Annealing Using Embedded Micro‐Heater for Highly Sensitive and Selective Gas Detection J Park, H Shin, G Jung, S Hong, MK Park, J Hwang, JH Bae, JJ Kim, ... Advanced Science, 2401821, 2024 | 1 | 2024 |
| SNNSim: Investigation and Optimization of Large‐Scale Analog Spiking Neural Networks Based on Flash Memory Devices J Ko, D Kwon, J Hwang, KH Lee, S Oh, J Kim, J Im, RH Koo, JJ Kim, ... Advanced Intelligent Systems 6 (4), 2300456, 2024 | 1 | 2024 |
| Lateral Migration‐based Flash‐like Synaptic Device for Hybrid Off‐chip/On‐chip Training MK Park, J Hwang, KM Lee, SY Woo, JJ Kim, JH Bae, JH Lee Advanced Electronic Materials 10 (4), 2300866, 2024 | 1 | 2024 |
Jong-Ho LeeDepartment of Electrical and Computer Engineering, Seoul National UniversityDirección de correo verificada de snu.ac.kr