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David Atienza
David Atienza
Professor of Electrical and Computer Engineering, EPFL
Dirección de correo verificada de epfl.ch - Página principal
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Compressed sensing for real-time energy-efficient ECG compression on wireless body sensor nodes
H Mamaghanian, N Khaled, D Atienza, P Vandergheynst
IEEE Transactions on Biomedical Engineering 58 (9), 2456-2466, 2011
8992011
3D-ICE: A compact thermal model for early-stage design of liquid-cooled ICs
A Sridhar, A Vincenzi, D Atienza, T Brunschwiler
IEEE Transactions on Computers 63 (10), 2576-2589, 2014
520*2014
HOLLOWS: A power-aware task scheduler for energy harvesting sensor nodes
JR Piorno, C Bergonzini, D Atienza, TS Rosing
Journal of Intelligent Material Systems and Structures 21 (13), 1317-1335, 2010
370*2010
The COUGHVID crowdsourcing dataset, a corpus for the study of large-scale cough analysis algorithms
L Orlandic, T Teijeiro, D Atienza
Scientific Data 8 (1), 156, 2021
3182021
Designing application-specific networks on chips with floorplan information
S Murali, P Meloni, F Angiolini, D Atienza, S Carta, L Benini, G De Micheli, ...
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006
2622006
Dynamic thermal management in 3D multicore architectures
AK Coskun, JL Ayala, D Atienza, TS Rosing, Y Leblebici
2009 Design, Automation & Test in Europe Conference & Exhibition, 1410-1415, 2009
2602009
Network-on-chip design and synthesis outlook
D Atienza, F Angiolini, S Murali, A Pullini, L Benini, G De Micheli
Integration 41 (3), 340-359, 2008
2092008
An integrated hardware/software approach for run-time scratchpad management
P Francesco, P Marchal, D Atienza, L Benini, F Catthoor, JM Mendias
Proceedings of the 41st Annual Design Automation Conference, 238-243, 2004
1912004
A complete network-on-chip emulation framework
N Genko, D Atienza, G De Micheli, JM Mendias, R Hermida, F Catthoor
Design, Automation and Test in Europe, 246-251, 2005
1882005
Online obstructive sleep apnea detection on medical wearable sensors
G Surrel, A Aminifar, F Rincón, S Murali, D Atienza
IEEE transactions on biomedical circuits and systems 12 (4), 762-773, 2018
167*2018
Temperature-aware processor frequency assignment for mpsocs using convex optimization
S Murali, A Mutapcic, D Atienza, R Gupta, S Boyd, G De Micheli
Proceedings of the 5th IEEE/ACM international conference on Hardware …, 2007
1672007
Development and evaluation of multilead wavelet-based ECG delineation algorithms for embedded wireless sensor nodes
F Rincón, J Recas, N Khaled, D Atienza
IEEE Transactions on Information Technology in Biomedicine 15 (6), 854-863, 2011
1432011
Temperature control of high-performance multi-core platforms using convex optimization
S Murali, A Mutapcic, D Atienza, R Gupta, S Boyd, L Benini, G De Micheli
Proceedings of the conference on Design, automation and test in Europe, 110-115, 2008
1392008
Energy-efficient variable-flow liquid cooling in 3D stacked architectures
AK Coskun, D Atienza, TS Rosing, T Brunschwiler, B Michel
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
1382010
Real-time event-driven classification technique for early detection and prevention of myocardial infarction on wearable systems
D Sopic, A Aminifar, A Aminifar, D Atienza
IEEE transactions on biomedical circuits and systems 12 (5), 982-992, 2018
137*2018
Integrating heuristic and machine-learning methods for efficient virtual machine allocation in data centers
A Pahlevan, X Qu, M Zapater, D Atienza
IEEE transactions on computer-aided design of integrated circuits and …, 2017
116*2017
A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip
S Murali, D Atienza, L Benini, G De Michel
Proceedings of the 43rd annual Design Automation Conference, 845-848, 2006
1162006
e-glass: A wearable system for real-time detection of epileptic seizures
D Sopic, A Aminifar, D Atienza
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
1152018
Feature-NoC emulation: a tool and design flow for MPSoC
N Genko, D Atienza, G De Micheli, L Benini
IEEE Circuits and Systems Magazine 7 (4), 42-51, 2007
115*2007
A mapping flow for dynamically reconfigurable multi-core system-on-chip design
I Beretta, V Rana, D Atienza, D Sciuto
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
1102011
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Artículos 1–20