Artículos con órdenes de acceso público - Dragomir MilojevicMás información
Disponibles en algún lugar: 5
Design and optimization of SRAM macro and logic using backside interconnects at 2nm node
R Chen, G Sisto, A Jourdain, G Hiblot, M Stucchi, N Kakarla, B Chehab, ...
2021 IEEE International Electron Devices Meeting (IEDM), 22.4. 1-22.4. 4, 2021
Órdenes: European Commission
High-performance logic-on-memory monolithic 3-D IC designs for arm Cortex-A processors
L Zhu, L Bamberg, SSK Pentapati, K Chang, F Catthoor, D Milojevic, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (6 …, 2021
Órdenes: US Department of Defense, Department of Science & Technology, India
Hier-3D: A hierarchical physical design methodology for face-to-face-bonded 3D ICs
A Agnesina, M Brunion, A García-Ortiz, F Catthoor, D Milojevic, ...
Proceedings of the ACM/IEEE International Symposium on Low Power Electronics …, 2022
Órdenes: US Department of Defense
A MOO‐based Methodology for Designing 3D Stacked Integrated Circuits
NAV Doan, D Milojevic, F Robert, Y De Smet
Journal of Multi‐Criteria Decision Analysis 21 (1-2), 43-63, 2014
Órdenes: National Fund for Scientific Research, Belgium
Energy minimization at all layers of the data center: The ParaDIME Project
O Palomar, S Rethinagiri, G Yalcin, R Titos-Gil, P Prieto, E Torrella, ...
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 684-689, 2016
Órdenes: Gobierno de España
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