| Networks on Chips: A New SoC Paradigm L Benini, G De Micheli IEEE Computer, 70-78, 2002 | 5278 | 2002 |
| Synthesis and Optimization of Digital Circuits G DE MICHELI McGraw-Hill, 579p, 1994 | 3804 | 1994 |
| A survey of design techniques for system-level dynamic power management L Benini, A Bogliolo, G De Micheli IEEE transactions on very large scale integration (VLSI) systems 8 (3), 299-316, 2000 | 1916 | 2000 |
| Bandwidth-constrained mapping of cores onto NoC architectures S Murali, G De Micheli Proceedings design, automation and test in Europe conference and exhibition …, 2004 | 948 | 2004 |
| Hardware-software cosynthesis for digital systems RK Gupta, G De Micheli IEEE Design & test of computers 10 (3), 29-41, 1993 | 853 | 1993 |
| NoC synthesis flow for customized domain specific multiprocessor systems-on-chip D Bertozzi, A Jalabert, S Murali, R Tamhankar, S Stergiou, L Benini, ... IEEE transactions on parallel and distributed systems 16 (2), 113-129, 2005 | 746 | 2005 |
| System-level power optimization: techniques and tools L Benini, G Micheli ACM Transactions on Design Automation of Electronic Systems (TODAES) 5 (2 …, 2000 | 686 | 2000 |
| Hardware/software co-design G De Michell, RK Gupta Proceedings of the IEEE 85 (3), 349-365, 1997 | 631 | 1997 |
| Analysis of power consumption on switch fabrics in network routers TT Ye, GD Micheli, L Benini Proceedings of the 39th annual design automation conference, 524-529, 2002 | 625 | 2002 |
| Policy optimization for dynamic power management L Benini, A Bogliolo, GA Paleologo, G De Micheli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1999 | 581 | 1999 |
| Networks on Chips G De Micheli, L Benini Springer, 2008 | 557 | 2008 |
| Dynamic power management: design techniques and CAD tools L Benini, G DeMicheli Springer Science & Business Media, 2012 | 540 | 2012 |
| Networks on chip: A new paradigm for systems on chip design L Benini, G De Micheli Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002 | 506 | 2002 |
| Optimal state assignment for finite state machines G De Micheli, RK Brayton, A Sangiovanni-Vincentelli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1985 | 476 | 1985 |
| Analysis of error recovery schemes for networks on chips S Murali, T Theocharides, N Vijaykrishnan, MJ Irwin, L Benini, ... IEEE Design & Test of Computers 22 (5), 434-442, 2005 | 443 | 2005 |
| Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems L Benini, G De Micheli, E Macii, D Sciuto, C Silvano Proceedings Great Lakes Symposium on VLSI, 77-82, 1997 | 431 | 1997 |
| SUNMAP: a tool for automatic topology selection and generation for NoCs S Murali, G De Micheli Proceedings of the 41st annual Design Automation Conference, 914-919, 2004 | 421 | 2004 |
| Advances, challenges and opportunities in 3D CMOS sequential integration P Batude, M Vinet, B Previtali, C Tabone, C Xu, J Mazurier, O Weber, ... 2011 International Electron Devices Meeting, 7.3. 1-7.3. 4, 2011 | 414 | 2011 |
| The EPFL combinational benchmark suite L Amarú, PE Gaillardon, G De Micheli Proceedings of the 24th International Workshop on Logic & Synthesis (IWLS), 2015 | 400 | 2015 |
| xpipesCompiler: A tool for instantiating application-specific Networks on Chip A Jalabert, S Murali, L Benini, G De Micheli Design, Automation, and Test in Europe: The Most Influential Papers of 10 …, 2008 | 383 | 2008 |