| An overview of the BlueGene/L supercomputer NR Adiga, G Almási, GS Almasi, Y Aridor, R Barik, D Beece, R Bellofatto, ... SC'02: Proceedings of the 2002 ACM/IEEE Conference on Supercomputing, 60-60, 2002 | 686 | 2002 |
| Overview of the Blue Gene/L system architecture A Gara, MA Blumrich, D Chen, GLT Chiu, P Coteus, ME Giampapa, ... IBM Journal of research and development 49 (2.3), 195-212, 2005 | 565 | 2005 |
| Multi-petascale highly efficient parallel supercomputer S Asaad, RE Bellofatto, MA Blocksome, MA Blumrich, P Boyle, ... US Patent 9,081,501, 2015 | 562 | 2015 |
| The IBM Blue Gene/Q Compute Chip R Haring, M Ohmacht, T Fox, M Gschwind, P Boyle, N Chist, C Kim, ... Micro, IEEE, 1-1, 2012 | 372 | 2012 |
| Ultrascalable petaflop parallel supercomputer MA Blumrich, D Chen, G Chiu, TM Cipolla, PW Coteus, AG Gara, ... US Patent 7,761,687, 2010 | 285 | 2010 |
| Evaluation of Blue Gene/Q hardware support for transactional memories A Wang, M Gaudet, P Wu, JN Amaral, M Ohmacht, C Barton, R Silvera, ... Proceedings of the 21st international conference on Parallel architectures …, 2012 | 282 | 2012 |
| Active memory cube: A processing-in-memory architecture for exascale systems R Nair, SF Antao, C Bertolli, P Bose, JR Brunheroto, T Chen, CY Cher, ... IBM Journal of Research and Development 59 (2/3), 17: 1-17: 14, 2015 | 237 | 2015 |
| Overview of the IBM Blue Gene/P project G Almasi, S Asaad, RE Bellofatto, HR Bickford, MA Blumrich, B Brezzo, ... IBM Journal of Research and Development, 2008 | 219 | 2008 |
| The design, deployment, and evaluation of the CORAL pre-exascale systems SS Vazhkudai, BR De Supinski, AS Bland, A Geist, J Sexton, J Kahle, ... SC18: International Conference for High Performance Computing, Networking …, 2018 | 193 | 2018 |
| Multi-petascale highly efficient parallel supercomputer S Asaad, RE Bellofatto, MA Blocksome, MA Blumrich, P Boyle, ... US Patent 9,971,713, 2018 | 81 | 2018 |
| Checkpointing in speculative versioning caches AE Eichenberger, A Gara, MK Gschwind, M Ohmacht US Patent 8,521,961, 2013 | 60 | 2013 |
| Conditional load and store in a shared memory MA Blumrich, M Ohmacht US Patent 8,949,539, 2015 | 54 | 2015 |
| Local rollback for fault-tolerance in parallel computing systems MA Blumrich, D Chen, A Gara, ME Giampapa, P Heidelberger, ... US Patent 8,103,910, 2012 | 51 | 2012 |
| Method and apparatus of prefetching streams of varying prefetch depth A Gara, M Ohmacht, V Salapura, K Sugavanam, D Hoenicke US Patent 8,103,832, 2012 | 45 | 2012 |
| Snoop filter for filtering snoop requests MA Blumrich, D Chen, AG Gara, ME Giampapa, P Heidelberger, ... US Patent 7,373,462, 2008 | 45 | 2008 |
| Programmable stream prefetch with resource optimization P Boyle, N Christ, A Gara, R Mawhinney, M Ohmacht, K Sugavanam US Patent 8,347,039, 2013 | 44 | 2013 |
| Blue Gene/L compute chip: Memory and Ethernet subsystem M Ohmacht, RA Bergamaschi, S Bhattacharya, A Gara, ME Giampapa, ... IBM Journal of Research and Development 49 (2.3), 255-264, 2005 | 44 | 2005 |
| HiPAR-DSP: A parallel VLIW RISC processor for real time image processing applications JP Wittenburg, M Ohmacht, J Kneip, W Hinrichs, P Pirsch Proceedings of 3rd International Conference on Algorithms and Architectures …, 1997 | 43 | 1997 |
| Low latency memory access and synchronization MA Blumrich, D Chen, PW Coteus, AG Gara, ME Giampapa, ... US Patent 7,174,434, 2007 | 40 | 2007 |
| Method and apparatus to debug an integrated circuit chip via synchronous clock stop and scan RE Bellofatto, MR Ellavsky, AG Gara, ME Giampapa, TM Gooding, ... US Patent 8,140,925, 2012 | 39 | 2012 |
