| A prototype document image analysis system for technical journals G Nagy, S Seth, M Viswanathan Computer 25 (7), 10-22, 2002 | 610 | 2002 |
| Hierarchical representation of optically scanned documents G Nagy, SC Seth | 504 | 1984 |
| Syntactic segmentation and labeling of digitized pages from technical journals M Krishnamoorthy, G Nagy, S Seth, M Viswanathan IEEE Transactions on Pattern Analysis and Machine Intelligence 15 (7), 737-747, 2002 | 269 | 2002 |
| HGA: A hardware-based genetic algorithm SD Scott, A Samal, S Seth Proceedings of the 1995 ACM third international symposium on Field …, 1995 | 262 | 1995 |
| PREDICT: Probabilistic estimation of digital circuit testability SC Seth Proc. 15th Int. Fault-Tolerant Computer Symp., 220-225, 1985 | 259 | 1985 |
| A feature-based approach to conflation of geospatial sources A Samal, S Seth, K Cueto 1 International Journal of Geographical Information Science 18 (5), 459-489, 2004 | 243 | 2004 |
| Document analysis with an expert system G Nagy Proc. Pattern Recognition in Practice II, Amsterdam, 1985, 19-21, 1985 | 191 | 1985 |
| Tutorial test generation for VLSI chips VD Agrawal, SC Seth (No Title), 1988 | 179 | 1988 |
| Fault coverage requirement in production testing of LSI circuits VD Agrawal, SC Seth, P Agrawal IEEE Journal of Solid-State Circuits 17 (1), 57-61, 1982 | 156 | 1982 |
| A system for recognizing a large class of engineering drawings Y Yu, A Samal, SC Seth IEEE Transactions on Pattern Analysis and Machine Intelligence 19 (8), 868-890, 1997 | 118 | 1997 |
| A statistical theory of digital circuit testability SC Seth, VD Agrawal, H Farhat IEEE Transactions on Computers 39 (4), 582-586, 1990 | 93 | 1990 |
| Characterizing the LSI yield equation from wafer test data SC Seth, VD Agrawal | 90 | 1984 |
| A new model for computation of probabilistic testability in combinational circuits SC Seth, VD Agrawal Integration 7 (1), 49-75, 1989 | 75 | 1989 |
| An analysis of the use of Rademacher–Walsh spectrum in compact testing TC Hsiao IEEE transactions on computers 100 (10), 934-937, 1984 | 70 | 1984 |
| An exact analysis for efficient computation of random-pattern testability in combinational circuits SC Seth, BB Bhattacharya, V Agrawal | 68 | 1986 |
| Decoding substitution ciphers by means of word matching with application to OCR G Nagy, S Seth, K Einspahr IEEE Transactions on Pattern Analysis and Machine Intelligence, 710-715, 1987 | 60 | 1987 |
| An experimental study on reject ratio prediction for VLSI circuits: Kokomo revisited DV Das, SC Seth, PT Wagner, JC Anderson, VD Agrawal Proceedings. International Test Conference 1990, 712-720, 1990 | 59 | 1990 |
| Generating tests for delay faults in nonscan circuits P Agrawal, VD Agrawal, SC Seth IEEE Design & Test of Computers 10 (1), 20-28, 1993 | 56 | 1993 |
| Diagnosis of faults in linear tree networks SC Seth, KL Kodandapani IEEE Transactions on Computers 100 (1), 29-33, 1977 | 56 | 1977 |
| Integrated text and line-art extraction from a topographic map L Li, G Nagy, A Samal, S Seth, Y Xu International Journal on Document Analysis and Recognition 2, 177-185, 2000 | 54 | 2000 |
George NagyElectrical,Computer,and Systems Engineering, Rensselaer Polytechnic InstituteVerified email at ecse.rpi.edu