Articles with public access mandates - Nathaniel PinckneyLearn more
Not available anywhere: 2
A fine-grained GALS SoC with pausible adaptive clocking in 16 nm FinFET
M Fojtik, B Keller, A Klinefelter, N Pinckney, SG Tell, B Zimmer, T Raja, ...
2019 25th IEEE International Symposium on Asynchronous Circuits and Systems …, 2019
Mandates: US Department of Defense
IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCs
N Pinckney, R Venkatesan, B Keller, B Khailany
2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021
Mandates: US Department of Defense
Available somewhere: 7
Simba: Scaling deep-learning inference with multi-chip-module-based architecture
YS Shao, J Clemons, R Venkatesan, B Zimmer, M Fojtik, N Jiang, B Keller, ...
Proceedings of the 52nd annual IEEE/ACM international symposium on …, 2019
Mandates: US Department of Defense
Magnet: A modular accelerator generator for neural networks
R Venkatesan, YS Shao, M Wang, J Clemons, S Dai, M Fojtik, B Keller, ...
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
Mandates: US Department of Defense
A 0.32–128 TOPS, scalable multi-chip-module-based deep neural network inference accelerator with ground-referenced signaling in 16 nm
B Zimmer, R Venkatesan, YS Shao, J Clemons, M Fojtik, N Jiang, B Keller, ...
IEEE Journal of Solid-State Circuits 55 (4), 920-932, 2020
Mandates: US National Science Foundation, US Department of Defense
A modular digital VLSI flow for high-productivity SoC design
B Khailany, E Khmer, R Venkatesan, J Clemons, JS Emer, M Fojtik, ...
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
Mandates: US Department of Defense
A 0.11 pj/op, 0.32-128 tops, scalable multi-chip-module-based deep neural network accelerator with ground-reference signaling in 16nm
B Zimmer, R Venkatesan, YS Shao, J Clemons, M Fojtik, N Jiang, B Keller, ...
2019 Symposium on VLSI Circuits, C300-C301, 2019
Mandates: US Department of Defense
Simba: scaling deep-learning inference with chiplet-based architecture
YS Shao, J Cemons, R Venkatesan, B Zimmer, M Fojtik, N Jiang, B Keller, ...
Communications of the ACM 64 (6), 107-116, 2021
Mandates: US Department of Defense
A 0.11 pj/op, 0.32-128 tops, scalable multi-chip-module-based deep neural network accelerator designed with A high-productivity vlsi methodology
R Venkatesan, YS Shao, B Zimmer, J Clemons, M Fojtik, N Jiang, B Keller, ...
2019 IEEE Hot Chips 31 Symposium (HCS), 1-24, 2019
Mandates: US Department of Defense
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