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Juanita DeLoach, PhD
Juanita DeLoach, PhD
Intellectual Property Attorney
Verified email at btlaw.com
Title
Cited by
Cited by
Year
Correlation between titania film structure and near ultraviolet optical absorption
JD DeLoach, G Scarel, CR Aita
Journal of applied physics 85 (4), 2377-2384, 1999
1211999
Thickness-dependent crystallinity of sputter-deposited titania
JD DeLoach, CR Aita
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 16 (3 …, 1998
561998
An enhanced 90nm high performance technology with strong performance improvements from stress and mobility increase through simple process changes
R Khamankar, H Bu, C Bowen, S Chakravarthi, PR Chidambaram, ...
Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004., 162-163, 2004
292004
Method for manufacturing a semiconductor device containing metal silicide regions
J Deloach, LH Hall, LS Robertson, JP Lu, DS Miles
US Patent 7,422,967, 2008
222008
In situ hardmask pullback using an in situ plasma resist trim process
J Deloach, BA Smith
US Patent 7,320,927, 2008
202008
Optical absorption behavior of nanolaminate films
CR Aita, JD DeLoach, RS Sorbello
Journal of applied physics 94 (1), 654-663, 2003
182003
Method for moat nitride pull back for shallow trench isolation
F Mehrad, Z Chen, J Deloach
US Patent 6,818,526, 2004
152004
interface structure in nanolaminates with ultrathin periodicity
CR Aita, JD DeLoach, VV Yakovlev
Applied physics letters 81 (2), 238-240, 2002
152002
Phase development in annealed zirconia-titania nanolaminates
JD DeLoach, JJ Shibilski, CR Crape, CR Aita
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 18 (6 …, 2000
132000
Growth-controlled cubic zirconia microstructure in zirconia–titania nanolaminates
JD DeLoach, CR Aita, CK Loong
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 20 (5 …, 2002
122002
60 nm gate length dual-Vt CMOS for high performance applications
M Mehrotra, J Wu, A Jain, T Laaksonen, K Kim, W Bather, R Koshy, ...
2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No …, 2002
122002
Method for forming a metal silicide
H Bu, S Ekbote, J Deloach
US Patent 7,897,513, 2011
102011
Process method to fabricate cmos circuits with dual stress contact etch-stop liner layers
S Yu, J Deloach, BA Smith, YS Obeng, SG Bushman
US Patent App. 11/778,321, 2009
92009
Nickel salicide process technology for cmos devices of 90nm node and beyond
JP Lu, DS Miles, J DeLoach, DF Yue, PJ Chen, T Bonifield, S Crank, ...
2006 International Workshop on Junction Technology, 127-133, 2006
92006
Nickel silicide formation for semiconductor components
J Deloach, JP Lu, H Bu
US Patent 8,546,259, 2013
82013
High refractive index< 100>-textured cubic zirconia formed in nanolaminates using titania interruption layers
JD DeLoach, CR Aita
Journal of materials science letters 19 (13), 1123-1125, 2000
82000
Dielectric function of thin-film titanium oxide with a granular nanostructure
RS Sorbello, JD DeLoach, CR Aita, P Fejes
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 2004
72004
A high performance 90 nm logic technology with a 37 nm gate length, dual plasma nitrided gate dielectric and differential offset spacer
B Hornung, R Khamankar, H Niimi, M Goodwin, L Robertson, D Miles, ...
2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No …, 2003
62003
Method of manufacturing metal silicide contacts
YS Obeng, J Deloach, F Mehrad
US Patent 7,670,952, 2010
52010
Forming a trench to define one or more isolation regions in a semiconductor structure
J Deloach, F Mehrad, BM Trentman, TA Yocum
US Patent 6,905,943, 2005
32005
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