| Temperature effect on RF/analog and linearity parameters in DMG FinFET R Saha, B Bhowmick, S Baishya Applied Physics A 124, 1-10, 2018 | 90 | 2018 |
| Sensitivity analysis on dielectric modulated Ge-source DMDG TFET based label-free biosensor R Saha, Y Hirpara, S Hoque IEEE Transactions on Nanotechnology 20, 552-560, 2021 | 48 | 2021 |
| Statistical dependence of gate metal work function on various electrical parameters for an n-channel Si step-FinFET R Saha, B Bhowmick, S Baishya IEEE Transactions on Electron Devices 64 (3), 969-976, 2017 | 38 | 2017 |
| Methods to reduce ambipolar current of various TFET structures: a review S Tiwari, R Saha Silicon 14 (12), 6507-6515, 2022 | 34 | 2022 |
| Simulation study on ferroelectric layer thickness dependence RF/Analog and linearity parameters in ferroelectric tunnel junction TFET R Saha Microelectronics Journal 113, 105081, 2021 | 34 | 2021 |
| 3D analytical modeling of surface potential, threshold voltage, and subthreshold swing in dual-material-gate (DMG) SOI FinFETs R Saha, S Baishya, B Bhowmick Journal of Computational Electronics 17, 153-162, 2018 | 32 | 2018 |
| Analysis on effect of lateral straggle on analog, high frequency and DC parameters in Ge‐source DMDG TFET R Saha, DK Panda, R Goswami, B Bhowmick, S Baishya International Journal of RF and Microwave Computer‐Aided Engineering 31 (4 …, 2021 | 30 | 2021 |
| Dependence of RF/analog and linearity figure of merits on temperature in ferroelectric FinFET: a simulation study R Saha, R Goswami, B Bhowmick, S Baishya IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control 67 …, 2020 | 30 | 2020 |
| Deep insight into DC, RF/analog, and digital inverter performance due to variation in straggle parameter for gate modulated TFET R Saha, K Vanlalawmpuia, B Bhowmick, S Baishya Materials Science in Semiconductor Processing 91, 102-107, 2019 | 26 | 2019 |
| Si and Ge step-FinFETs: Work function variability, optimization and electrical parameters R Saha, B Bhowmick, S Baishya Superlattices and Microstructures 107, 5-16, 2017 | 25 | 2017 |
| DC and RF/analog performances of split source horizontal pocket and hetero stack TFETs considering interface trap charges: a simulation study S Tiwari, R Saha Microelectronics Reliability 137, 114780, 2022 | 24 | 2022 |
| Analytical modelling for surface potential of dual material gate overlapped-on-drain TFET (DM-DMG-TFET) for label-free biosensing application NN Reddy, DK Panda, R Saha AEU-International Journal of Electronics and Communications 151, 154225, 2022 | 23 | 2022 |
| Analysis on DC and RF/analog performance in multifin-FinFET for wide variation in work function of metal gate Y Hirpara, R Saha Silicon 13 (1), 73-77, 2021 | 23 | 2021 |
| DC and RF/analog parameters in Ge‐source split drain‐ZHP‐TFET: drain and pocket engineering technique R Saha, DK Panda, R Goswami, B Bhowmick, S Baishya International Journal of Numerical Modelling: Electronic Networks, Devices …, 2022 | 19 | 2022 |
| Impact of WFV on electrical parameters due to high-k/metal gate in SiGe channel tunnel FET R Saha, B Bhowmick, S Baishya Microelectronic Engineering 214, 1-4, 2019 | 18 | 2019 |
| Improved optical performance in near visible light detection photosensor based on TFET S Tiwari, R Saha Microelectronics Journal 129, 105554, 2022 | 17 | 2022 |
| Performance evaluation of hetero-stacked TFET for variation in lateral straggle and its application as digital inverter K Vanlalawmpuia, R Saha, B Bhowmick Applied Physics A 124 (10), 701, 2018 | 17 | 2018 |
| Analysis on electrical parameters including temperature and interface trap charges in gate overlap Ge source step shape double gate TFET R Saha, R Goswami, DK Panda Microelectronics Journal 130, 105629, 2022 | 16 | 2022 |
| Impact of lateral straggle on linearity performance in gate-modulated (GM) TFET R Saha, B Bhowmick, S Baishya Applied Physics A 126, 1-5, 2020 | 15 | 2020 |
| Effect of gate dielectric on electrical parameters due to metal gate WFV in n‐channel Si step FinFET R Saha, B Bhowmick, S Baishya Micro & Nano Letters 13 (7), 1007-1010, 2018 | 15 | 2018 |
Dr. BRINDA BHOWMICKProfessor, NIT SilcharVerified email at ece.nits.ac.in