| IntAct: A 96-core processor with six chiplets 3D-stacked on an active interposer with distributed interconnects and integrated power management P Vivet, E Guthmuller, Y Thonnart, G Pillonnet, C Fuguet, I Miro-Panades, ... IEEE Journal of Solid-State Circuits 56 (1), 79-97, 2020 | 90 | 2020 |
| 2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm2 Inter-Chiplet Interconnects and 156mW/mm … P Vivet, E Guthmuller, Y Thonnart, G Pillonnet, G Moritz, I Miro-Panadès, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 46-48, 2020 | 67 | 2020 |
| Energy and execution time comparison of optical flow algorithms on SIMD and GPU architectures A Petreto, A Hennequin, T Koehler, T Romera, Y Fargeix, B Gaillard, ... 2018 Conference on Design and Architectures for Signal and Image Processing …, 2018 | 27 | 2018 |
| A new direct connected component labeling and analysis algorithms for GPUs A Hennequin, L Lacassagne, L Cabaret, Q Meunier 2018 Conference on Design and Architectures for Signal and Image Processing …, 2018 | 25 | 2018 |
| Fault attack vulnerability assessment of binary code JB Bréjon, K Heydemann, E Encrenaz, Q Meunier, ST Vu Proceedings of the Sixth Workshop on Cryptography and Security in Computing …, 2019 | 20 | 2019 |
| Symbolic approach for side-channel resistance analysis of masked assembly codes IB El Ouahma, QL Meunier, K Heydemann, E Encrenaz Security Proofs for Embedded Systems, 2017 | 16 | 2017 |
| Side-channel robustness analysis of masked assembly codes using a symbolic approach I Ben El Ouahma, QL Meunier, K Heydemann, E Encrenaz Journal of Cryptographic Engineering 9, 231-242, 2019 | 12 | 2019 |
| Executing secured virtual machines within a manycore architecture C Dévigne, JB Bréjon, QL Meunier, F Wajsbürt Microprocessors and Microsystems 48, 21-35, 2017 | 10 | 2017 |
| Implementations impact on iterative image processing for embedded GPU T Romera, A Petreto, F Lemaitre, M Bouyer, Q Meunier, L Lacassagne 2021 29th European Signal Processing Conference (EUSIPCO), 736-740, 2021 | 9 | 2021 |
| A new real-time embedded video denoising algorithm A Petreto, T Romera, F Lemaitre, I Masliah, B Gaillard, M Bouyer, ... 2019 Conference on Design and Architectures for Signal and Image Processing …, 2019 | 8 | 2019 |
| FastCPA: Efficient correlation power analysis computation with a large number of traces QL Meunier Proceedings of the Sixth Workshop on Cryptography and Security in Computing …, 2019 | 8 | 2019 |
| Lightweight Transactional Memory systems for NoCs based architectures: Design, implementation and comparison of two policies QL Meunier, F Pétrot Journal of Parallel and Distributed Computing 70 (10), 1024-1041, 2010 | 8 | 2010 |
| A 29 Gops/Watt 3D-ready 16-core computing fabric with scalable cache coherent architecture using distributed L2 and adaptive L3 caches E Guthmuller, C Fuguet, P Vivet, C Bernard, I Miro-Panades, J Durupt, ... ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC …, 2018 | 7 | 2018 |
| SELA: A symbolic expression leakage analyzer QL Meunier, IB El Ouahma, K Heydemann International Workshop on Security Proofs for Embedded Systems, 2020 | 6 | 2020 |
| Rwt: Suppressing write-through cost when coherence is not needed H Liu, C Dévigne, L Garcia, Q Meunier, F Wajsbürt, A Greiner 2015 IEEE Computer Society Annual Symposium on VLSI, 434-439, 2015 | 6 | 2015 |
| LeakageVerif: Efficient and Scalable Formal Verification of Leakage in Symbolic Expressions QL Meunier, E Pons, K Heydemann IEEE Transactions on Software Engineering 49 (6), 3359-3375, 2023 | 5* | 2023 |
| ARMISTICE: Microarchitectural leakage modeling for masked software formal verification A De Grandmaison, K Heydemann, QL Meunier IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 5 | 2022 |
| Maskara: Compilation of a Masking Countermeasure With Optimized Polynomial Interpolation N Belleville, D Couroussé, K Heydemann, Q Meunier, IB El Ouahma IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 5 | 2020 |
| Optical flow algorithms optimized for speed, energy and accuracy on embedded GPUs T Romera, A Petreto, F Lemaitre, M Bouyer, Q Meunier, L Lacassagne, ... Journal of Real-Time Image Processing 20 (2), 32, 2023 | 4 | 2023 |
| Comparaison de la consommation énergétique et du temps d'exécution d'un algorithme de traitement d'images optimisé sur des architectures SIMD et GPU A Petreto, A Hennequin, T Koehler, T Romera, Y Fargeix, B Gaillard, ... Conférence d’informatique en Parallélisme, Architecture et Système (COMPAS 2018), 2018 | 4 | 2018 |
