Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states J Chen, T Tanaka, Y Fong, KN Quader US Patent 6,522,580, 2003 | 857 | 2003 |
High density non-volatile Flash memory without adverse effects of electric field coupling between adjacent floating gates J Chen, Y Fong US Patent 5,867,429, 1999 | 835 | 1999 |
Compensating for coupling during read operations of non-volatile memory J Chen US Patent 7,196,928, 2007 | 790 | 2007 |
Selective operation of a multi-state non-volatile memory system in a binary mode J Chen US Patent 6,456,528, 2002 | 768 | 2002 |
Variable programming of non-volatile memory J Chen, CM Wang US Patent 7,020,017, 2006 | 739 | 2006 |
Read operation for non-volatile storage that includes compensation for coupling Y Li, J Chen US Patent 7,187,585, 2007 | 616 | 2007 |
Multi-state non-volatile flash memory capable of being its own two state write cache DJ Lee, J Chen US Patent 5,930,167, 1999 | 547 | 1999 |
Compensating for coupling during read operations of non-volatile memory J Chen US Patent 7,315,477, 2008 | 477 | 2008 |
Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell T Tanaka, J Chen US Patent 6,643,188, 2003 | 466 | 2003 |
The impact of gate-induced drain leakage current on MOSFET scaling TY Chan, J Chen, PK Ko, C Hu 1987 International Electron Devices Meeting, 718-721, 1987 | 458 | 1987 |
Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells RA Cernea, KN Quader, Y Li, J Chen, Y Fong US Patent 6,781,877, 2004 | 360 | 2004 |
Subbreakdown drain leakage current in MOSFET J Chen, TY Chan, IC Chen, PK Ko, C Hu IEEE Electron Device Letters 8 (11), 515-517, 1987 | 358 | 1987 |
Flash memory with targeted read scrub algorithm ST Sprouse, A Bauche, Y Huang, J Chen, J Huang, D Lee US Patent 9,053,808, 2015 | 353 | 2015 |
Operating techniques for reducing program and read disturbs of a non-volatile memory Y Li, J Chen, RA Cernea US Patent 6,771,536, 2004 | 325 | 2004 |
Behavior based programming of non-volatile memory J Chen, JW Lutze, Y Li, DC Guterman, T Tanaka US Patent 7,177,199, 2007 | 324 | 2007 |
Source side self boosting technique for non-volatile memory JW Lutze, J Chen, Y Li, M Higashitani US Patent 6,859,397, 2005 | 297 | 2005 |
Selective operation of a multi-state non-volatile memory system in a binary mode J Chen US Patent 6,717,847, 2004 | 263 | 2004 |
Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements J Chen, T Tanaka, Y Fong, KN Quader US Patent 6,807,095, 2004 | 220 | 2004 |
Method of reading NAND memory to compensate for coupling between storage elements J Chen US Patent 7,372,730, 2008 | 217 | 2008 |
Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells RA Cernea, KN Quader, Y Li, J Chen, Y Fong US Patent 6,870,768, 2005 | 216 | 2005 |