Salvatore Pontarelli

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Pedro ReviriegoUniversidad Politécnica de MadridVerified email at upm.es
Marco OttaviUniversity of Rome Tor VergataVerified email at ing.uniroma2.it
giuseppe bianchiUniversità di Roma Tor VergataVerified email at uniroma2.it
marco bonolaconsorzio nazionale interuniversitario per le telecomunicazioniVerified email at uniroma2.it
Fabrizio LombardiInternational Test Conference (ITC) Endowed Chair Professor, Northeastern UniversityVerified email at ece.neu.edu
Roberto BifulcoNEC Laboratories EuropeVerified email at neclab.eu
Valerio BruschiPhD, Università di Roma Tor Vergata/CNITVerified email at uniroma2.it
Leonardo LinguaglossaAssociate Professor, Telecom ParisVerified email at telecom-paristech.fr
Davide SanvitoNEC Laboratories EuropeVerified email at neclab.eu
Marco Spaziani BrunellaUniversity of California, BerkeleyVerified email at berkeley.edu
Giacomo BelocchiUniversity of Rome 'Tor Vergata'Verified email at uniroma2.it
Giuseppe SiracusanoNEC Laboratories EuropeVerified email at neclab.eu
Luca PetrucciUniversità di Roma Tor Vergata/CNITVerified email at cnit.it
Dhiraj K PradhanProfessor of Computer Science, University of BristolVerified email at cs.bris.ac.uk
Angelo TulumelloResearcher, CNIT/University of Rome Tor VergataVerified email at cnit.it
Damjan MarionPrincipal Engineer, Cisco SystemsVerified email at cisco.com
Michael MitzenmacherProfessor of Computer Science, Harvard UniversityVerified email at eecs.harvard.edu
Felipe HuiciNEC Laboratories EuropeVerified email at neclab.eu
Anees UllahUniversity of Engineering and Technology, PeshawarVerified email at uetpeshawar.edu.pk
Antonino PietropaoloENEAVerified email at enea.it

Salvatore Pontarelli

Computer Science - Sapienza

Verified email at uniroma1.it - Homepage

Fault tolerance computer networks networking


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{FlowBlaze}: Stateful packet processing in hardware S Pontarelli, R Bifulco, M Bonola, C Cascone, M Spaziani, V Bruschi, ... 16th USENIX Symposium on Networked Systems Design and Implementation (NSDI …, 2019	208	2019
Survey of performance acceleration techniques for network function virtualization L Linguaglossa, S Lange, S Pontarelli, G Rétvári, D Rossi, T Zinner, ... Proceedings of the IEEE 107 (4), 746-764, 2019	131	2019
hXDP: Efficient software packet processing on FPGA NICs MS Brunella, G Belocchi, M Bonola, S Pontarelli, G Siracusano, G Bianchi, ... Communications of the ACM 65 (8), 92-100, 2022	123	2022
High-speed software data plane via vectorized packet processing D Barach, L Linguaglossa, D Marion, P Pfister, S Pontarelli, D Rossi IEEE Communications Magazine 56 (12), 97-103, 2018	116	2018
A new hardware/software platform and a new 1/E neutron source for soft error studies: Testing FPGAs at the ISIS facility M Violante, L Sterpone, A Manuzzato, S Gerardin, P Rech, M Bagatin, ... Nuclear Science, IEEE Transactions on 54 (4), 1184-1189, 2007	108	2007
Traffic-aware design of a high-speed FPGA network intrusion detection system S Pontarelli, G Bianchi, S Teofili IEEE transactions on computers 62 (11), 2322-2334, 2012	98	2012
Adaptive cuckoo filters M Mitzenmacher, S Pontarelli, P Reviriego Journal of Experimental Algorithmics (JEA) 25, 1-20, 2020	97	2020
Totally fault tolerant RNS based FIR filters S Pontarelli, GC Cardarilli, M Re, A Salsano 2008 14th IEEE International On-Line Testing Symposium, 192-194, 2008	97	2008
Design of a fault tolerant solid state mass memory GC Cardarilli, A Leandri, P Marinucci, M Ottavi, S Pontarelli, M Re, ... IEEE Transactions on Reliability 52 (4), 476-491, 2003	94	2003
Tuplemerge: Fast software packet processing for online packet classification J Daly, V Bruschi, L Linguaglossa, S Pontarelli, D Rossi, J Tollet, E Torng, ... IEEE/ACM transactions on networking 27 (4), 1417-1431, 2019	90	2019
QCA circuits for robust coplanar crossing S Bhanja, M Ottavi, F Lombardi, S Pontarelli Journal of Electronic Testing 23 (2), 193-210, 2007	76	2007
MCU tolerance in SRAMs through low-redundancy triple adjacent error correction LJ Saiz-Adalid, P Reviriego, P Gil, S Pontarelli, JA Maestro IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (10 …, 2014	73	2014
Fault tolerant solid state mass memory for space applications GC Cardarilli, M Ottavi, S Pontarelli, M Re, A Salsano IEEE Transactions on Aerospace and Electronic Systems 41 (4), 1353-1372, 2005	70	2005
A method to construct low delay single error correction codes for protecting data bits only P Reviriego, S Pontarelli, JA Maestro, M Ottavi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013	68	2013
Open Packet Processor: a programmable architecture for wire speed platform-independent stateful in-network processing G Bianchi, M Bonola, S Pontarelli, D Sanvito, A Capone, C Cascone arXiv preprint arXiv:1605.01977, 2016	65	2016
Complementary resistive switch-based arithmetic logic implementations using material implication Y Yang, J Mathew, S Pontarelli, M Ottavi, DK Pradhan IEEE Transactions on nanotechnology 15 (1), 94-108, 2015	58	2015
Area efficient concurrent error detection and correction for parallel filters P Reviriego, S Pontarelli, CJ Bleakley, JA Maestro Electronics letters 48 (20), 1258-1260, 2012	57	2012
Bit flip injection in processor-based architectures: a case study GC Cardarilli, F Kaddour, A Leandri, M Ottavi, S Pontarelli, R Velazco Proceedings of the Eighth IEEE International On-Line Testing Workshop (IOLTW …, 2002	53	2002
Efficient caching of TCAM rules in RAM G Levy, P Reviriego, A Kfir, S Pontarelli US Patent 10,476,794, 2019	50	2019
Partially reversible pipelined QCA circuits: combining low power with high throughput M Ottavi, S Pontarelli, EP DeBenedictis, A Salsano, S Frost-Murphy, ... IEEE transactions on nanotechnology 10 (6), 1383-1393, 2011	50	2011

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