SOT-MRAM 300mm integration for low power and ultrafast embedded memories K Garello, F Yasin, S Couet, L Souriau, J Swerts, S Rao, S Van Beek, ... 2018 IEEE symposium on VLSI Circuits, 81-82, 2018 | 177 | 2018 |
Voltage-gate-assisted spin-orbit-torque magnetic random-access memory for high-density and low-power embedded applications YC Wu, K Garello, W Kim, M Gupta, M Perumkunnil, V Kateel, S Couet, ... Physical Review Applied 15 (6), 064015, 2021 | 76 | 2021 |
SOT-MRAM based analog in-memory computing for DNN inference J Doevenspeck, K Garello, B Verhoef, R Degraeve, S Van Beek, D Crotti, ... 2020 IEEE Symposium on VLSI Technology, 1-2, 2020 | 72 | 2020 |
Solving the BEOL compatibility challenge of top-pinned magnetic tunnel junction stacks J Swerts, E Liu, S Couet, S Mertens, S Rao, W Kim, K Garello, L Souriau, ... 2017 IEEE International Electron Devices Meeting (IEDM), 38.6. 1-38.6. 4, 2017 | 33 | 2017 |
2018 ieee symposium on vlsi circuits K Garello, F Yasin, S Couet, L Souriau, J Swerts, S Rao, S Van Beek, ... IEEE, 2018 | 30 | 2018 |
First demonstration of field-free perpendicular SOT-MRAM for ultrafast and high-density embedded memories K Cai, G Talmelli, K Fan, S Van Beek, V Kateel, M Gupta, MG Monteiro, ... 2022 International Electron Devices Meeting (IEDM), 36.2. 1-36.2. 4, 2022 | 27 | 2022 |
Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories K Cai, S Van Beek, S Rao, K Fan, M Gupta, VD Nguyen, G Jayakumar, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 24 | 2022 |
Array-Based Statistical Characterization of CMOS Degradation Modes and Modeling of the Time-Dependent Variability Induced by Different Stress Patterns in the $\{\boldsymbol {V … E Bury, A Chasin, M Vandemaele, S Van Beek, J Franco, B Kaczer, ... 2019 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2019 | 24 | 2019 |
BEOL compatible high retention perpendicular SOT-MRAM device for SRAM replacement and machine learning S Couet, S Rao, S Van Beek, VD Nguyen, K Garello, V Kateel, ... 2021 Symposium on VLSI Technology, 1-2, 2021 | 23 | 2021 |
Thermal stability analysis and modelling of advanced perpendicular magnetic tunnel junctions S Van Beek, K Martens, P Roussel, YC Wu, W Kim, S Rao, J Swerts, ... AIP Advances 8 (5), 2018 | 22 | 2018 |
STT-MRAM array performance improvement through optimization of Ion Beam Etch and MTJ for Last-Level Cache application S Rao, W Kim, S Van Beek, S Kundu, M Perumkunnil, S Cosemans, ... 2021 IEEE International Memory Workshop (IMW), 1-4, 2021 | 21 | 2021 |
Experimental observation of back-hopping with reference layer flipping by high-voltage pulse in perpendicular magnetic tunnel junctions W Kim, S Couet, J Swerts, T Lin, Y Tomczak, L Souriau, D Tsvetanova, ... IEEE Transactions on Magnetics 52 (7), 1-4, 2016 | 20 | 2016 |
Impact of self-heating on reliability predictions in STT-MRAM S Van Beek, BJ O'Sullivan, PJ Roussel, R Degraeve, E Bury, J Swerts, ... 2018 IEEE International Electron Devices Meeting (IEDM), 25.2. 1-25.2. 4, 2018 | 17 | 2018 |
Impact of processing and stack optimization on the reliability of perpendicular STT-MRAM S Van Beek, K Martens, P Roussel, S Couet, L Souriau, J Swerts, W Kim, ... 2017 IEEE International Reliability Physics Symposium (IRPS), 5A-1.1-5A-1.5, 2017 | 16 | 2017 |
Four point probe ramped voltage stress as an efficient method to understand breakdown of STT-MRAM MgO tunnel junctions S Van Beek, K Martens, P Roussel, G Donadio, J Swerts, S Mertens, ... 2015 IEEE International Reliability Physics Symposium, MY. 4.1-MY. 4.6, 2015 | 16 | 2015 |
JSWof 5.5 MA/cm2 and RA of 5.2-Ω · μm2 STT-MRAM Technology for LLC Application S Sakhare, S Rao, M Perumkunnil, S Couet, D Crotti, S Van Beek, ... IEEE Transactions on Electron Devices 67 (9), 3618-3625, 2020 | 12 | 2020 |
Modeling and Understanding the Compact Performance of h‐BN Dual‐Gated ReS2 Transistor K Lee, J Choi, B Kaczer, A Grill, JW Lee, S Van Beek, E Bury, ... Advanced Functional Materials 31 (23), 2100625, 2021 | 10 | 2021 |
Scaling the SOT track–A path towards maximizing efficiency in SOT-MRAM S Van Beek, K Cai, F Yasin, H Hody, G Talmelli, VD Nguyen, NF Vergel, ... 2023 International Electron Devices Meeting (IEDM), 1-4, 2023 | 8 | 2023 |
Stt-mram stochastic and defects-aware dtco for last level cache at advanced process nodes F García-Redondo, S Rao, M Gupta, M Perumkunnil, Y Xiang, D Abdi, ... ESSDERC 2023-IEEE 53rd European Solid-State Device Research Conference …, 2023 | 8 | 2023 |
Impact of ambient temperature on the switching of voltage-controlled perpendicular magnetic tunnel junction YC Wu, W Kim, S Van Beek, S Couet, R Carpenter, S Rao, S Kundu, ... Applied Physics Letters 118 (12), 2021 | 7 | 2021 |