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Citations per year
Duplicate citations
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Since 2019
Citations
19
3
h-index
2
1
i10-index
1
0
0
4
2
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
1
3
1
1
3
3
1
1
1
1
1
1
Co-authors
Kamakoti Veezhinathan
Professor, Department of Computer Science, IIT Madras
Verified email at cse.iitm.ac.in
Prasanth Mangalagiri
EDA Engineer at Intel Corporation
Verified email at intel.com
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Karnam Uday Bhaskar
System Validation Engineer at
Intel Corporation
Verified email at intel.com
Computer Science and Engineering
Validation
Verification and Testing
CAD for VLSI
Articles
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Year
A universal random test generator for functional verification of microprocessors and system-on-chip
KU Bhaskar, M Prasanth, G Chandramouli, V Kamakoti
18th International Conference on VLSI Design held jointly with 4th …
, 2005
17
2005
A Framework for Automatic Assembly Program Generator (A^ 2PG) for Verification and Testing of Processor Cores
KU Bhaskar, M Prasanth, V Kamakoti, K Maneparambil
14th Asian Test Symposium (ATS'05), 40-45
, 2005
2
2005
Pariksa - Functional Verification Tool for x86 Architecture
VK K Uday Bhaskar, G Chandramouli
8th VLSI Design & Test Workshop (VDAT), 492-502
, 2004
2004
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