Atmospheric-pressure plasma sources for biomedical applications GY Park, SJ Park, MY Choi, IG Koo, JH Byun, JW Hong, JY Sim, ... Plasma Sources Science and Technology 21 (4), 043001, 2012 | 439 | 2012 |
Wireless smart contact lens for diabetic diagnosis and therapy DH Keum, SK Kim, J Koo, GH Lee, C Jeon, JW Mok, BH Mun, KJ Lee, ... Science advances 6 (17), eaba3252, 2020 | 365 | 2020 |
A fully-integrated 71 nW CMOS temperature sensor for low power wireless sensor nodes S Jeong, Z Foo, Y Lee, JY Sim, D Blaauw, D Sylvester IEEE Journal of solid-state circuits 49 (8), 1682-1693, 2014 | 240 | 2014 |
A 1 GHz ADPLL With a 1.25 ps Minimum-Resolution Sub-Exponent TDC in 0.18m CMOS SK Lee, YH Seo, HJ Park, JY Sim IEEE Journal of Solid-State Circuits 45 (12), 2874-2881, 2010 | 211 | 2010 |
A 21 fJ/conversion-step 100 kS/s 10-bit ADC with a low-noise time-domain comparator for low-power sensor interface SK Lee, SJ Park, HJ Park, JY Sim IEEE Journal of Solid-State Circuits 46 (3), 651-659, 2011 | 209 | 2011 |
Biomimetic anti-reflective triboelectric nanogenerator for concurrent harvesting of solar and raindrop energies D Yoo, SC Park, S Lee, JY Sim, I Song, D Choi, H Lim, DS Kim Nano Energy 57, 424-431, 2019 | 162 | 2019 |
A digital-domain calibration of split-capacitor DAC for a differential SAR ADC without additional analog circuits JY Um, YJ Kim, EW Song, JY Sim, HJ Park IEEE Transactions on Circuits and Systems I: Regular Papers 60 (11), 2845-2856, 2013 | 134 | 2013 |
5.8 A 9.3 nW all-in-one bandgap voltage and current reference circuit Y Ji, C Jeon, H Son, B Kim, HJ Park, JY Sim 2017 IEEE International Solid-State Circuits Conference (ISSCC), 100-101, 2017 | 116 | 2017 |
A 1.25 ps Resolution 8b Cyclic TDC in 0.13m CMOS YH Seo, JS Kim, HJ Park, JY Sim IEEE Journal of Solid-State Circuits 47 (3), 736-743, 2011 | 112 | 2011 |
A serpentine guard trace to reduce the far-end crosstalk voltage and the crosstalk induced timing jitter of parallel microstrip lines K Lee, HB Lee, HK Jung, JY Sim, HJ Park IEEE transactions on advanced packaging 31 (4), 809-817, 2008 | 108 | 2008 |
A Global Model for the Identification of the Dominant Reactions for Atomic Oxygen in He/O2 Atmospheric‐Pressure Plasmas GY Park, YJ Hong, HW Lee, JY Sim, JK Lee Plasma Processes and Polymers 7 (3‐4), 281-287, 2010 | 106 | 2010 |
Bimetallic nanocatalysts immobilized in nanoporous hydrogels for long‐term robust continuous glucose monitoring of smart contact lens SK Kim, GH Lee, C Jeon, HH Han, SJ Kim, JW Mok, CK Joo, S Shin, ... Advanced Materials 34 (18), 2110536, 2022 | 105 | 2022 |
Toward sustainable output generation of liquid–solid contact triboelectric nanogenerators: The role of hierarchical structures H Cho, J Chung, G Shin, JY Sim, DS Kim, S Lee, W Hwang Nano energy 56, 56-64, 2019 | 104 | 2019 |
12.6 A 160nW 63.9 fJ/conversion-step capacitance-to-digital converter for ultra-low-power wireless sensor nodes H Ha, D Sylvester, D Blaauw, JY Sim 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 104 | 2014 |
5.7 A 29nW bandgap reference circuit JM Lee, Y Ji, S Choi, YC Cho, SJ Jang, JS Choi, B Kim, HJ Park, JY Sim 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 102 | 2015 |
A 300-MS/s, 1.76-ps-resolution, 10-b asynchronous pipelined time-to-digital converter with on-chip digital background calibration in 0.13-µm CMOS JS Kim, YH Seo, Y Suh, HJ Park, JY Sim IEEE Journal of Solid-State Circuits 48 (2), 516-526, 2012 | 81 | 2012 |
A 192-pW Voltage Reference Generating Bandgap– With Process and Temperature Dependence Compensation Y Ji, J Lee, B Kim, HJ Park, JY Sim IEEE Journal of Solid-State Circuits 54 (12), 3281-3291, 2019 | 75 | 2019 |
A 1.3 μW 0.6 V 8.7-ENOB successive approximation ADC in a 0.18 μm CMOS SK Lee, SJ Park, Y Suh, HJ Park, JY Sim 2009 Symposium on VLSI Circuits, 242-243, 2009 | 74 | 2009 |
A 0.63 ps resolution, 11b pipeline TDC in 0.13 µm CMOS YH Seo, JS Kim, HJ Park, JY Sim 2011 symposium on VLSI circuits-digest of technical papers, 152-153, 2011 | 71 | 2011 |
Serpentine microstrip lines with zero far-end crosstalk for parallel high-speed DRAM interfaces K Lee, HK Jung, HJ Chi, HJ Kwon, JY Sim, HJ Park IEEE Transactions on Advanced Packaging 33 (2), 552-558, 2009 | 66 | 2009 |