Three dimensional integrated circuit SM Alam, IM Elfadel, KW Guarini, M Ieong, PN Kudva, DS Kung, MA Lavin, ... US Patent 7,312,487, 2007 | 371 | 2007 |
Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs) AW Topol, DC La Tulipe, L Shi, SM Alam, DJ Frank, SE Steen, J Vichiconti, ... Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International …, 2005 | 370 | 2005 |
Three dimensional integrated circuit and method of design SM Alam, IM Elfadel, KW Guarini, M Ieong, PN Kudva, DS Kung, MA Lavin, ... US Patent 7,723,207, 2010 | 281 | 2010 |
A fully functional 64 Mb DDR3 ST-MRAM built on 90 nm CMOS technology ND Rizzo, D Houssameddine, J Janesky, R Whig, FB Mancoff, ... IEEE Transactions on Magnetics 49 (7), 4441-4446, 2013 | 165 | 2013 |
Power delivery design for 3-D ICs using different through-silicon via (TSV) technologies NH Khan, SM Alam, S Hassoun IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (4), 647-658, 2010 | 161 | 2010 |
A comprehensive layout methodology and layout-specific circuit analyses for three-dimensional integrated circuits SM Alam, DE Troxel, CV Thompson Proceedings International Symposium on Quality Electronic Design, 246-251, 2002 | 141 | 2002 |
Layout-specific circuit evaluation in 3-D integrated circuits SM Alam, DE Troxel, CV Thompson Analog Integrated Circuits and Signal Processing 35, 199-206, 2003 | 123 | 2003 |
Electrical modeling and characterization of through-silicon vias (TSVs) for 3-D integrated circuits I Savidis, SM Alam, A Jain, S Pozder, RE Jones, R Chatterjee Microelectronics Journal 41 (1), 9-16, 2010 | 94 | 2010 |
Demonstration of a Reliable 1 Gb Standalone Spin-Transfer Torque MRAM For Industrial Applications S Aggarwal, H Almasi, M DeHerrera, B Hughes, S Ikegawa, J Janesky, ... 2019 IEEE International Electron Devices Meeting (IEDM), 2.1. 1-2.1. 4, 2019 | 91 | 2019 |
High density ST-MRAM technology JM Slaughter, ND Rizzo, J Janesky, R Whig, FB Mancoff, ... Electron Devices Meeting (IEDM), 2012 IEEE International, 29.3. 1-29.3. 4, 2012 | 80 | 2012 |
System-level comparison of power delivery design for 2D and 3D ICs NH Khan, SM Alam, S Hassoun 2009 IEEE International Conference on 3D System Integration, 1-7, 2009 | 66 | 2009 |
Inter-strata connection characteristics and signal transmission in three-dimensional (3D) integration technology SM Alam, RE Jones, S Rauf, R Chatterjee Proceedings of the 8th International Symposium on Quality Electronic Design …, 2007 | 63 | 2007 |
Low power magnetic quantum cellular automata realization using magnetic multi-layer structures J Das, SM Alam, S Bhanja IEEE Journal on Emerging and Selected Topics in Circuits and Systems 1 (3 …, 2011 | 60 | 2011 |
Method of forming a through-substrate via TG Sparks, SM Alam, R Chatterjee, S Rauf US Patent App. 11/558,988, 2008 | 59 | 2008 |
CMOS-embedded STT-MRAM arrays in 2x nm nodes for GP-MCU applications D Shum, D Houssameddine, ST Woo, YS You, J Wong, KW Wong, ... 2017 Symposium on VLSI Technology, T208-T209, 2017 | 54 | 2017 |
Ultra-low power hybrid CMOS-magnetic logic architecture J Das, SM Alam, S Bhanja IEEE Transactions on Circuits and Systems I: Regular Papers 59 (9), 2008-2016, 2012 | 49 | 2012 |
Through-silicon via (TSV)-induced noise characterization and noise mitigation using coaxial TSVs NH Khan, SM Alam, S Hassoun 2009 IEEE International Conference on 3D System Integration, 1-7, 2009 | 48 | 2009 |
Technology for reliable spin-torque MRAM products JM Slaughter, K Nagel, R Whig, S Deshpande, S Aggarwal, M DeHerrera, ... 2016 IEEE International Electron Devices Meeting (IEDM), 21.5. 1-21.5. 4, 2016 | 44 | 2016 |
Circuit level reliability analysis of Cu interconnects SM Alam, GC Lip, CV Thompson, DE Troxel Quality Electronic Design, 2004. Proceedings. 5th International Symposium on …, 2004 | 44 | 2004 |
Circuit-level reliability requirements for Cu metallization SM Alam, CL Gan, FL Wei, CV Thompson, DE Troxel IEEE Transactions on Device and Materials Reliability 5 (3), 522-531, 2005 | 37 | 2005 |