A 300 nW, 15 ppm/ K Ueno, T Hirose, T Asai, Y Amemiya
IEEE Journal of solid-state circuits 44 (7), 2047-2054, 2009
468 2009 1.2-V supply, 100-nW, 1.09-V bandgap and 0.7-V supply, 52.5-nW, 0.55-V subbandgap reference circuits for nanowatt CMOS LSIs Y Osaki, T Hirose, N Kuroki, M Numa
IEEE Journal of Solid-State Circuits 48 (6), 1530-1538, 2013
302 2013 A low-power level shifter with logic error correction for extremely low-voltage digital CMOS LSIs Y Osaki, T Hirose, N Kuroki, M Numa
IEEE Journal of Solid-State Circuits 47 (7), 1776-1783, 2012
145 2012 A 1- K Ueno, T Hirose, T Asai, Y Amemiya
IEEE Transactions on Circuits and Systems II: Express Briefs 57 (9), 681-685, 2010
113 2010 A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities T Hirose, Y Osaki, N Kuroki, M Numa
2010 Proceedings of ESSCIRC, 114-117, 2010
110 2010 Fully-integrated high-conversion-ratio dual-output voltage boost converter with MPPT for low-voltage energy harvesting T Ozaki, T Hirose, H Asano, N Kuroki, M Numa
IEEE Journal of Solid-State Circuits 51 (10), 2398-2407, 2016
84 2016 CMOS smart sensor for monitoring the quality of perishables K Ueno, T Hirose, T Asai, Y Amemiya
IEEE Journal of Solid-State Circuits 42 (4), 798-803, 2007
63 2007 A CMOS bandgap and sub-bandgap voltage reference circuits for nanowatt power LSIs T Hirose, K Ueno, N Kuroki, M Numa
2010 IEEE Asian Solid-State Circuits Conference, 1-4, 2010
62 2010 An 80-mV-to-1.8-V conversion-range low-energy level shifter for extremely low-voltage VLSIs R Matsuzuka, T Hirose, Y Shizuku, K Shinonaga, N Kuroki, M Numa
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (8), 2026-2035, 2017
47 2017 Analog reaction-diffusion chip imitating Belousov-Zhabotinsky reaction with hardware oregonator model T Asai, Y Kanazawa, T Hirose, Y Amemiya
Int. J. Unconv. Comput. 1 (2), 123-147, 2005
45 2005 A 32.55-kHz, 472-nW, 120ppm/° C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application K Tsubaki, T Hirose, N Kuroki, M Numa
2013 Proceedings of the ESSCIRC (ESSCIRC), 315-318, 2013
44 2013 Neuronal synchrony detection on single-electron neural networks T Oya, T Asai, R Kagaya, T Hirose, Y Amemiya
Chaos, Solitons & Fractals 27 (4), 887-894, 2006
39 2006 A 46-ppm/° C temperature and process compensated current reference with on-chip threshold voltage monitoring circuit K Ueno, T Hirose, T Asai, Y Amemiya
2008 IEEE Asian Solid-State Circuits Conference, 161-164, 2008
38 2008 A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs R Matsuzuka, T Hirose, Y Shizuku, N Kuroki, M Numa
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2948-2951, 2015
33 2015 Reference current source circuit provided with plural power source circuits having temperature characteristics T Hirose, K Toyoaki, Y Osaki
US Patent 8,305,134, 2012
31 2012 A level shifter circuit design by using input/output voltage monitoring technique for ultra-low voltage digital CMOS LSIs Y Osaki, T Hirose, N Kuroki, M Numa
2011 IEEE 9th International New Circuits and systems conference, 201-204, 2011
27 2011 Ultralow-power current reference circuit with low temperature dependence T Hirose, T Matsuoka, K Taniguchi, T Asai, Y Amemiya
IEICE transactions on electronics 88 (6), 1142-1147, 2005
27 2005 A 0.1–0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvesting Y Tsuji, T Hirose, T Ozaki, H Asano, N Kuroki, M Numa
2017 24th IEEE International conference on electronics, circuits and systems …, 2017
26 2017 A 1.66-nW/kHz, 32.7-kHz, 99.5 ppm/° C fully integrated current-mode RC oscillator for real-time clock applications with PVT stability H Asano, T Hirose, K Tsubaki, T Miyoshi, T Ozaki, N Kuroki, M Numa
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 149-152, 2016
26 2016 Ultralow-power smart temperature sensor with subthreshold CMOS circuits K Ueno, T Hirose, T Asai, Y Amemiya
2006 International Symposium on Intelligent Signal Processing and …, 2005
26 2005 
Tetsuya AsaiHokkaido UniversityVerified email at ist.hokudai.ac.jp