| Neurogrid: A mixed-analog-digital multichip system for large-scale neural simulations BV Benjamin, P Gao, E McQuinn, S Choudhary, AR Chandrasekaran, ... Proceedings of the IEEE 102 (5), 699-716, 2014 | 1445 | 2014 |
| Silicon neurons that compute S Choudhary, S Sloan, S Fok, A Neckar, E Trautmann, P Gao, T Stewart, ... Artificial Neural Networks and Machine Learning–ICANN 2012: 22nd …, 2012 | 118 | 2012 |
| Shared resources for multiple communication traffics DD Sharma, S Choudhary US Patent 11,818,058, 2023 | 32 | 2023 |
| Method and system for cache agent trace and capture B Fahim, S Choudhary US Patent 10,534,687, 2020 | 18 | 2020 |
| Die-to-die adapter S Choudhary, DD Sharma, N Lanka, L Seshan, G Pasdast, Z Wu US Patent App. 17/856,050, 2022 | 9 | 2022 |
| System, apparatus and method for increasing bandwidth of edge-located agents of an integrated circuit B Ganesh, YC Liu, S Choudhary, T Singh, P Prabhakaran, M Agarwal US Patent 11,294,850, 2022 | 9 | 2022 |
| Mission-critical computing architecture B Fahim, S Choudhary, R Pal, V Geetha US Patent 10,514,990, 2019 | 8 | 2019 |
| Buffered interconnect for highly scalable on-die fabric S Choudhary, B Fahim, D Jayashimha, J Chamberlain, YC Liu US Patent App. 16/227,364, 2019 | 7 | 2019 |
| Link layer-PHY interface adapter N Lanka, S Choudhary, M Wagh, L Seshan US Patent 11,971,841, 2024 | 6 | 2024 |
| Parameter exchange for a die-to-die interconnect DD Sharma, MS Natu, S Muthrasanallur, S Choudhary, N Lanka, ... US Patent App. 17/855,687, 2022 | 5 | 2022 |
| Forward error correction and cyclic redundancy check mechanisms for latency-critical coherency and memory interconnects DD Sharma, S Choudhary US Patent App. 17/134,240, 2021 | 5 | 2021 |
| A Folding Strategy for DFGs derived from Projective Geometry based graphs S Choudhary, T Hiremani, H Sharma, S Patkar International Congress on Computer Applications and Computational Science, 2010 | 5 | 2010 |
| Die-to-die interconnect DD Sharma, S Choudhary, N Lanka, L Seshan, G Pasdast, Z Wu US Patent App. 17/852,865, 2022 | 4 | 2022 |
| Retimers to extend a die-to-die interconnect DD Sharma, S Choudhary, S Muthrasanallur, N Lanka, Z Wu, G Pasdast, ... US Patent App. 17/855,720, 2022 | 4 | 2022 |
| System, Apparatus and Method for Performing a Remote Atomic Operation Via an Interface J Svennebring, D Jayasimha, S Choudhary US Patent App. 16/830,468, 2020 | 4 | 2020 |
| Method, apparatus and system to send transactions without tracking I Agarwal, ER Wehage, DM Lee, S Choudhary, R Pal US Patent App. 15/070,146, 2017 | 4 | 2017 |
| Hardware logging for lane margining and characterization DD Sharma, MC Jen, S Choudhary, R Boddupalli US Patent App. 17/485,180, 2022 | 3 | 2022 |
| Latency-Optimized Mechanisms for Handling Errors or Mis-Routed Packets for Computer Buses S Choudhary, DD Sharma, M Wagh US Patent App. 17/031,822, 2021 | 3 | 2021 |
| Pipelined and Partitionable Forward Error Correction and Cyclic Redundancy Check Circuitry Implementation for PCI Express® 6.0 DD Sharma, S Choudhary 2023 IEEE Symposium on High-Performance Interconnects (HOTI), 1-8, 2023 | 2 | 2023 |
| Logical physical layer interface specification support for pcie 6.0, cxl 3.0, and upi 3.0 protocols S Choudhary, M Wagh, DD Sharma US Patent App. 17/231,152, 2021 | 2 | 2021 |