FPGA Acceleration of the Horn and Schunck Hierarchical algorithm I Bournias, R Chotin, L Lacassagne 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021 | 9 | 2021 |
Using hls for designing a parametric optical flow hierarchical algorithm in fpgas I Bournias, R Chotin, L Lacassagne 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 1600-1604, 2022 | 2 | 2022 |
High-level Partitioning and Design Space Exploration for Cyber Physical Systems. D Genius, I Bournias, L Apvrille, R Chotin MODELSWARD, 84-91, 2020 | 2 | 2020 |
Model-Based Virtual Prototyping of CPS: Application to Bio-Medical Devices D Genius, I Bournias, L Apvrille, R Chotin International Conference on Model-Driven Engineering and Software …, 2020 | 1 | 2020 |
AcceLLM: Accelerating LLM Inference using Redundancy for Load Balancing and Data Locality I Bournias, L Cavigelli, G Zacharopoulos arXiv preprint arXiv:2411.05555, 2024 | | 2024 |
Design space exploration of image processing algorithms on FPGAs I Bournias Sorbonne Université, 2023 | | 2023 |
ReDSEa: Automated Acceleration of Triangular Solver on Supercloud Heterogeneous Systems G Zacharopoulos, I Bournias, V Vlacic, L Cavigelli arXiv preprint arXiv:2305.19917, 2023 | | 2023 |
Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions F Pěcheux, L Andrade, MM Louërat, I Bournias, R Chotin, D Genius 2020 Forum for Specification and Design Languages (FDL), 1-8, 2020 | | 2020 |