| Process variability aware low leakage reliable nano scale double-gate-FinFET SRAM cell design technique S Khandelwal, V Gupta, B Raj, RD Gupta Journal of Nanoelectronics and Optoelectronics 10 (6), 810-817, 2015 | 47 | 2015 |
| Analyzing different mode FinFET based memory cell at different power supply for leakage reduction S Bhushan, S Khandelwal, B Raj Proceedings of Seventh International Conference on Bio-Inspired Computing …, 2013 | 47 | 2013 |
| FinFET based 6T SRAM cell design: analysis of performance metric, process variation and temperature effect S Khandelwal, B Raj, RD Gupta Journal of Computational and Theoretical Nanoscience 12 (9), 2500-2506, 2015 | 44 | 2015 |
| Design and analysis of FINFET pass transistor based XOR and XNOR circuits at 45 nm technology N Yadav, S Khandelwal, S Akashe 2013 International Conference on Control, Computing, Communication and …, 2013 | 25 | 2013 |
| Optimization of leakage current in SRAM cell using shorted gate DG FinFET V Sikarwar, S Khandelwal, S Akashe 2013 Third International Conference on Advanced Computing and Communication …, 2013 | 23 | 2013 |
| Supply voltage minimization techniques for SRAM leakage reduction S Khandelwal, S Akashe, S Sharma Journal of computational and theoretical nanoscience 9 (8), 1044-1048, 2012 | 19 | 2012 |
| Leakage current and dynamic power analysis of FinFET based 7T SRAM at 45 nm technology S Khandelwal, B Raj, RD Gupta Proceeding of the international arab conference on information technology …, 2013 | 17 | 2013 |
| Design of a FinFET based inverter using MTCMOS and SVL leakage reduction technique S Khandelwal, S Akashe 2013 Students Conference on Engineering and Systems (SCES), 1-6, 2013 | 16 | 2013 |
| Low power analysis in single stage source coupled VCO with AVL technique using nanoscale CMOS technology A Shrivastava, S Khandelwal, S Akashe 2013 Students Conference on Engineering and Systems (SCES), 1-6, 2013 | 14 | 2013 |
| 45nm bit-interleaving differential 10T low leakage FinFET based SRAM with column-wise write access control V Gupta, S Khandelwal, J Mathew, M Ottavi 2018 IEEE international symposium on defect and fault tolerance in VLSI and …, 2018 | 12 | 2018 |
| Multiple-gate silicon on insulator (SOI) MOSFETs: Device design and analysis A Dayal, SP Pandey, S Khandelwal, S Akashe 2013 Annual International Conference on Emerging Research Areas and 2013 …, 2013 | 12 | 2013 |
| Design of 10T SRAM with sleep transistor for leakage power reduction S Khandelwal, S Akashe Journal of Computational and Theoretical Nanoscience 10 (1), 165-170, 2013 | 11 | 2013 |
| Fault modeling and simulation of memristor based gas sensors S Khandelwal, A Bala, V Gupta, M Ottavi, E Martinelli, A Jabir 2019 IEEE 25th International Symposium on On-Line Testing and Robust System …, 2019 | 10 | 2019 |
| Karapandzic flap: a useful option for reconstruction of lower lip VD Sane, P Rathi, B Narla, S Khandelwal, W Pathan Journal of Craniofacial Surgery 30 (1), e32-e34, 2019 | 10 | 2019 |
| The missing applications found: Robust design techniques and novel uses of memristors M Ottavi, V Gupta, S Khandelwal, S Kvatinsky, J Mathew, E Martinelli, ... 2019 IEEE 25th International Symposium on On-Line Testing and Robust System …, 2019 | 9 | 2019 |
| Leakage current reduction in finfet based 6T SRAM cell for minimizing power dissipation in nanoscale memories V Gupta, S Khandelwal, B Raj, RD Gupta 2015 5th Nirma University International Conference on Engineering (NUiCONE), 1-5, 2015 | 9 | 2015 |
| Analysis of Leakage Reduction Techniques in Independent‐Gate DG FinFET SRAM Cell V Sikarwar, S Khandelwal, S Akashe Chinese Journal of Engineering 2013 (1), 738358, 2013 | 9 | 2013 |
| Implementation of high performance SRAM cell using transmission gate J Sharma, S Khandelwal, S Akashe 2015 Fifth international conference on advanced computing & communication …, 2015 | 8 | 2015 |
| Design Low Power High Performance 8: 1 MUX using Transmission Gate Logic (TGL) A Dixit, S Khandelwal, S Akashe International Journal of Modern Engineering & Management Research 2 (2), 14-20, 2014 | 8 | 2014 |
| Analysis and design of low power SRAM cell using independent gate FinFET V Sikarwar, S Khandelwal, S Akashe Radioelectronics and Communications Systems 56 (9), 434-440, 2013 | 8 | 2013 |
