Three dimensional NAND device with silicon germanium heterostructure channel P Rabkin, J Pachamuthu US Patent 9,331,093, 2016 | 390 | 2016 |
Vertical NAND device with low capacitance and silicided word lines J Alsmeier, P Rabkin US Patent 8,847,302, 2014 | 266 | 2014 |
Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device P Rabkin, J Pachamuthu, J Alsmeier US Patent 9,230,980, 2016 | 237 | 2016 |
3D non-volatile memory with metal silicide interconnect M Higashitani, P Rabkin US Patent 8,933,502, 2015 | 123 | 2015 |
Three dimensional NAND device containing fluorine doped layer and method of making thereof P Rabkin, J Pachamuthu, J Alsmeier US Patent 9,825,051, 2017 | 103 | 2017 |
Method for fabricating passive devices for 3D non-volatile memory M Higashitani, P Rabkin US Patent 8,951,859, 2015 | 103 | 2015 |
Three-dimensional memory device containing CMOS devices over memory stack structures Z Lu, A Lin, J Alsmeier, P Rabkin, W Zhao, WS Shi, H Chien, J Chen US Patent 9,530,790, 2016 | 100 | 2016 |
Punch-through diode P Rabkin, A Mihnea US Patent 8,557,654, 2013 | 95 | 2013 |
Vertical memory device with bit line air gap P Rabkin, XIA Jilin, J Pachamuthu US Patent 9,515,085, 2016 | 76 | 2016 |
Composition of memory cell with resistance-switching layers F Kreupl, A Bandyopadhyay, YT Chen, CC Fu, WP Jayasekara, J Kai, ... US Patent 8,520,424, 2013 | 74 | 2013 |
Multi-tier memory stack structure containing non-overlapping support pillar structures and method of making thereof P Ravikirthi, J Pachamuthu, J Sabde, P Rabkin US Patent 9,881,929, 2018 | 70 | 2018 |
Vertical TFT with tunnel barrier MC Wu, P Rabkin, T Chen US Patent 9,230,985, 2016 | 69 | 2016 |
MIIM diodes having stacked structure DC Sekar, T Kumar, P Rabkin, EX Ping, X Chen US Patent 7,969,011, 2011 | 66 | 2011 |
3D NAND with oxide semiconductor channel P Rabkin, J Alsmeier, M Higashitani US Patent 9,634,097, 2017 | 60 | 2017 |
Three dimensional NAND devices with air gap or low-k core P Rabkin, W Zhao, Y Zhang, J Pachamuthu US Patent 9,177,966, 2015 | 57 | 2015 |
Passive devices for 3D non-volatile memory M Higashitani, P Rabkin US Patent 8,643,142, 2014 | 57 | 2014 |
Miim diodes DC Sekar, T Kumar, P Rabkin, X Chen US Patent App. 12/240,766, 2010 | 55 | 2010 |
Band gap tailoring for a tunneling dielectric for a three-dimensional memory structure P Rabkin US Patent 9,449,980, 2016 | 49 | 2016 |
Method of making a three-dimensional memory device having a heterostructure quantum well channel P Rabkin, J Pachamuthu, J Alsmeier, M Higashitani US Patent 9,941,295, 2018 | 45 | 2018 |
Method for fabricating a metal silicide interconnect in 3D non-volatile memory M Higashitani, P Rabkin US Patent 8,956,968, 2015 | 44 | 2015 |