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Bibhash Sen
Bibhash Sen
Other namesDr. Bibhash Sen
Associate Professor of CSE Department, NIT Durgapur, WB-713209, India
Verified email at cse.nitdgp.ac.in - Homepage
Title
Cited by
Cited by
Year
Modular design of testable reversible ALU by QCA multiplexer with increase in programmability
B Sen, M Dutta, M Goswami, BK Sikdar
Microelectronics Journal 45 (11), 1522-1532, 2014
1802014
Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers
B Sen, M Goswami, S Mazumdar, BK Sikdar
Computers & Electrical Engineering 45, 42-54, 2015
962015
Design of efficient full adder in quantum‐dot cellular automata
B Sen, A Rajoria, BK Sikdar
The Scientific World Journal 2013 (1), 250802, 2013
872013
Realizing reversible computing in QCA framework resulting in efficient design of testable ALU
B Sen, M Dutta, S Some, BK Sikdar
ACM Journal on Emerging Technologies in Computing Systems (JETC) 11 (3), 1-22, 2014
732014
An efficient clocking scheme for quantum-dot cellular automata
M Goswami, A Mondal, MH Mahalat, B Sen, BK Sikdar
International Journal of Electronics Letters 8 (1), 83-96, 2020
712020
Efficient design of parity preserving logic in quantum-dot cellular automata targeting enhanced scalability in testing
B Sen, M Dutta, BK Sikdar
Microelectronics Journal 45 (2), 239-248, 2014
652014
On the reliability of majority logic structure in quantum-dot cellular automata
B Sen, Y Sahu, R Mukherjee, RK Nath, BK Sikdar
Microelectronics Journal 47, 7-18, 2016
602016
Towards the hierarchical design of multilayer QCA logic circuit
B Sen, A Nag, A De, BK Sikdar
Journal of Computational Science 11, 233-244, 2015
542015
Design of testable adder in quantum‐dot cellular automata with fault secure logic
M Goswami, B Sen, R Mukherjee, BK Sikdar
Microelectronics Journal 60, 1-12, 2017
522017
A PUF based light weight protocol for secure WiFi authentication of IoT devices
MH Mahalat, S Saha, A Mondal, B Sen
2018 8th International symposium on embedded computing and system design …, 2018
512018
Towards the design of hybrid QCA tiles targeting high fault tolerance
B Sen, M Dutta, R Mukherjee, RK Nath, AP Sinha, BK Sikdar
Journal of Computational Electronics 15 (2), 429-445, 2016
472016
Fault tolerant QCA logic design with coupled majority-minority gate
M Dalui, B Sen, BK Sikdar
Int. J. Comput. Appl 1 (29), 81-87, 2010
472010
An efficient multiplexer in quantum-dot cellular automata
B Sen, M Dutta, D Saran, BK Sikdar
Progress in VLSI Design and Test: 16th International Symposium, VDAT 2012 …, 2012
432012
Characterization of Universal NAN D-NOR Inverter
B Sen, BK Sikdar
Proc. 11th IEEE VLSI Design Test Symp, 442-443, 2007
432007
Design of conservative, reversible sequential logic for cost efficient emerging nano circuits with enhanced testability
NK Misra, S Wairya, B Sen
Ain Shams Engineering Journal 9 (4), 2027-2037, 2018
412018
Synthesis of reversible universal logic around QCA with online testability
B Sen, D Saran, M Saha, BK Sikdar
2011 International Symposium on Electronic System Design, 236-241, 2011
362011
Realization of processing in-memory computing architecture using quantum dot cellular automata
PP Chougule, B Sen, TD Dongale
Microprocessors and Microsystems 52, 49-58, 2017
312017
Towards designing efficient reversible binary code converters and a dual-rail checker for emerging nanocircuits
NK Misra, B Sen, S Wairya
Journal of Computational Electronics 16 (2), 442-458, 2017
292017
Optimal synthesis of QCA logic circuit eliminating wire‐crossings
RK Nath, B Sen, BK Sikdar
IET Circuits, Devices & Systems 11 (3), 201-208, 2017
292017
Reversible logic‐based fault‐tolerant nanocircuits in QCA
B Sen, S Ganeriwal, BK Sikdar
International Scholarly Research Notices 2013 (1), 850267, 2013
292013
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