| Spectral K-way ratio-cut partitioning and clustering PK Chan, MDF Schlag, JY Zien Proceedings of the 30th international Design Automation Conference, 749-754, 1993 | 756 | 1993 |
| Multilevel spectral hypergraph partitioning with arbitrary vertex sizes JY Zien, MDF Schlag, PK Chan IEEE Transactions on computer-aided design of integrated circuits and …, 1999 | 183 | 1999 |
| Rectilinear shortest paths and minimum spanning trees in the presence of rectilinear obstacles YF Wu IEEE Transactions on Computers 100 (3), 321-331, 1987 | 155 | 1987 |
| Routability-driven technology mapping for lookup table-based FPGA's M Schlag, J Kong, PK Chan IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1994 | 139 | 1994 |
| An algorithm for optimal two-dimensional compaction of VLSI layouts M Schlag, YZ Liao, CK Wong Integration 1 (2-3), 179-209, 1983 | 115 | 1983 |
| Architectural tradeoffs in field-programmable-device-based computing systems PK Chan, MDF Schlag [1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines, 152-161, 1993 | 97 | 1993 |
| Analysis and design of CMOS Manchester adders with variable carry-skip PK Chan, MDF Schlag IEEE Transactions on Computers 39 (8), 983-992, 1990 | 93 | 1990 |
| On routability prediction for field-programmable gate arrays PK Chan, MDF Schlag, JY Zien Proceedings of the 30th international Design Automation Conference, 326-330, 1993 | 85 | 1993 |
| Delay optimization of carry-skip adders and block carry-lookahead adders using multidimensional dynamic programming PK Chan, MDF Schlag, CD Thomborson, VG Oklobdzija IEEE Transactions on Computers 41 (08), 920-930, 1992 | 81 | 1992 |
| A visibility problem in VLSI layout compaction M Schlag, F Luccio, P Maestrini, DT Lee, CK Wong IBM Thomas J. Watson Research Division, 1983 | 77 | 1983 |
| Acceleration of an FPGA router PK Chan, MDF Schlag Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom …, 1997 | 55 | 1997 |
| Spectral-based multi-way FPGA partitioning PK Chan, MDF Schlag, JY Zien Proceedings of the 1995 ACM third international symposium on Field …, 1995 | 52 | 1995 |
| Bounds on signal delay in RC mesh networks PK Chan, MDF Schlag IEEE transactions on computer-aided design of integrated circuits and …, 1989 | 50 | 1989 |
| Delay optimization of carry-skip adders and block carry-lookahead adders PK Chan, MDF Schlag, CD Thomborson, VG Oklobdzija Proceedings 10th IEEE Symposium on Computer Arithmetic, 154,155,156,157,158 …, 1991 | 46 | 1991 |
| Parallel placement for field-programmable gate arrays PK Chan, MDF Schlag Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field …, 2003 | 43 | 2003 |
| New parallelization and convergence results for NC: A negotiation-based FPGA router PK Chan, MDF Schlag Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000 | 37 | 2000 |
| Distributed-memory parallel routing for field-programmable gate arrays PK Chan, MDF Schlag, C Ebeling, L McMurchie IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000 | 36 | 2000 |
| Empirical evaluation of multilevel logic minimization tools for a field-programmable gate array technology MDF Schlag, PK Chan, J Kong University of California at Santa Cruz, 1991 | 36 | 1991 |
| : An environment for the multi-level specification, analysis, and synthesis of hardware algorithms D Patel, M Schlag, M Ercegovac Conference on Functional Programming Languages and Computer Architecture …, 1985 | 31 | 1985 |
| ACME: A field-programmable gate array implementation of a self-adapting and scalable connectionist network AT Ferrucci University of California, Santa Cruz, 1994 | 28 | 1994 |
