| A tunable, power efficient active inductor-based 20 Gb/s CTLE in SerDes for 5G applications D Thulasiraman, JS Gaggatur Microelectronics Journal 95, 104657, 2020 | 20 | 2020 |
| Differential multi-phase DLL for reconfigurable radio frequency synthesizer JS Gaggatur, V Khatri, I Raja, MK Lenka, G Banerjee 2014 IEEE International Conference on Electronics, Computing and …, 2014 | 18 | 2014 |
| High gain capacitance sensor interface for the monitoring of cell volume growth JS Gaggatur, G Banerjee 2017 30th International Conference on VLSI Design and 2017 16th …, 2017 | 17 | 2017 |
| Noise analysis in ring oscillator-based capacitance sensor interface JS Gaggatur, G Banerjee 2016 IEEE 59th International Midwest Symposium on Circuits and Systems …, 2016 | 15 | 2016 |
| A 3.2 mW 0.13 μm high sensitivity frequency-domain CMOS capacitance interface JS Gaggatur, PK Dixena, G Banerjee 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 1070-1073, 2016 | 15 | 2016 |
| Integrated temperature sensor for reconfigurable radio frequency synthesizer JS Gaggatur, G Banerjee 2015 IEEE International Conference on Electronics, Computing and …, 2015 | 14 | 2015 |
| A power efficient active inductor-based receiver front end for 20 Gb/s high speed serial link JS Gaggatur, D Thulasiraman AEU-International Journal of Electronics and Communications 111, 152886, 2019 | 10 | 2019 |
| Solar-powered spike-based communication system with analog back scatter JS Gaggatur, M Machnoor 2015 IEEE Asia Pacific Conference on Postgraduate Research in …, 2015 | 10 | 2015 |
| An 860MHz-1960MHz multi-band multi-stage rectifier for RF energy harvesting in 130nm CMOS JS Gaggatur, SFS Vajrala 2020 IEEE International Conference on Electronics, Computing and …, 2020 | 9 | 2020 |
| A 18.6 fJ/bit/dB power efficient active inductor-based CTLE for 20 Gb/s high speed serial link D Thulasiraman, GN Chiranjeevi, JS Gaggatur, KSS Reddy 2019 IEEE International Conference on Electronics, Computing and …, 2019 | 9 | 2019 |
| On-chip non-intrusive temperature detection and compensation of a fully integrated CMOS RF power amplifier JS Gaggatur, I Raja, G Banerjee 2017 30th International Conference on VLSI Design and 2017 16th …, 2017 | 9 | 2017 |
| A 1.8–6.3 ghz quadrature ring vco-based fast-settling pll for wireline i/o in 55nm cmos JS Gaggatur 2021 34th International Conference on VLSI Design and 2021 20th …, 2021 | 8 | 2021 |
| A 0.6 V, 2nd order low-pass Gm-C filter using CMOS inverter-based tunable OTA with 1.114 GHz cut-off frequency in 90nm CMOS technology N Ramesh, JS Gaggatur 2021 34th International Conference on VLSI Design and 2021 20th …, 2021 | 8 | 2021 |
| 5‐GHz integer‐N PLL with spur reduction sampler D Biswas, GS Javed, KSS Reddy Electronics Letters 55 (23), 1217-1220, 2019 | 8 | 2019 |
| Novel spike-based architecture for RFID and Sensor communication system M Machnoor, JS Gaggatur, K Sanjeev IECON 2015-41st Annual Conference of the IEEE Industrial Electronics Society …, 2015 | 7 | 2015 |
| A 75-µW 2.4 GHz wake-up receiver in 65-nm CMOS for neonatal healthcare application K Kumar, KP Raghunath, A Muraleedharan, JS Gaggatur, G Banerjee 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 6 | 2019 |
| Time of arrival measurement for indoor distance monitoring in 130-nm CMOS JS Gaggatur, G Banerjee Measurement 146, 372-379, 2019 | 5 | 2019 |
| A 1.25–20 GHz wide tuning range frequency synthesis for 40-Gb/s SerDes application JS Gaggatur, A Chaturvedi International Symposium on VLSI Design and Test, 23-35, 2019 | 5 | 2019 |
| On-chip temperature compensated 2.5 GHz to 10GHz multi-band LC-VCO phase locked loop for wireline applications JS Gaggatur 2019 IEEE MTT-S International Microwave and RF Conference (IMARC), 1-5, 2019 | 4 | 2019 |
| Design of a spike-based architecture for Energy Harvested RFID-System M Machnoor, JS Gaggatur, K Sanjeev 2015 IEEE Bombay Section Symposium (IBSS), 1-6, 2015 | 4 | 2015 |
Gaurab BanerjeeProfessor at the Indian Institute of ScienceVerified email at ece.iisc.ernet.in