| Bipolar reading technique for a memory cell having an electrically floating body transistor S Okhonin, M Nagoga US Patent 7,477,540, 2009 | 596 | 2009 |
| New generation of Z-RAM S Okhonin, M Nagoga, E Carman, R Beffa, E Faraoni 2007 IEEE International Electron Devices Meeting, 925-928, 2007 | 404 | 2007 |
| Memory cell having an electrically floating body transistor and programming technique therefor S Okhonin, M Nagoga US Patent 7,476,939, 2009 | 380 | 2009 |
| Single transistor memory cell S Okhonin, M Nagoga US Patent 8,014,195, 2011 | 369 | 2011 |
| A capacitor-less 1T-DRAM cell S Okhonin, M Nagoga, JM Sallese, P Fazan IEEE Electron Device Letters 23 (2), 85-87, 2002 | 305 | 2002 |
| A SOI capacitor-less 1T-DRAM concept S Okhonin, M Nagoga, JM Sallese, P Fazan 2001 IEEE International SOI Conference. Proceedings (Cat. No. 01CH37207 …, 2001 | 257 | 2001 |
| Method for reading a memory cell having an electrically floating body transistor, and memory cell and array implementing same S Okhonin, M Nagoga US Patent App. 11/453,594, 2007 | 158 | 2007 |
| Circuitry for and method of improving statistical distribution of integrated circuits S Okhonin, M Nagoga US Patent 7,251,164, 2007 | 131 | 2007 |
| Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same S Okhonin, M Nagoga US Patent 7,606,066, 2009 | 121 | 2009 |
| Reading technique for memory cell with electrically floating body transistor S Okhonin, M Nagoga, C Bassin US Patent 8,085,594, 2011 | 64 | 2011 |
| Capacitor-less 1-transistor DRAM Fazan, Okhonin, Nagoga, Sallese, Portmann, Ferrant, Kayal, Pastre, ... 2002 IEEE International SOI Conference, 10-13, 2002 | 59 | 2002 |
| A simple 1-transistor capacitor-less memory cell for high performance embedded DRAMs PC Fazan, S Okhonin, M Nagoga, JM Sallese Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No …, 2002 | 46 | 2002 |
| Principles of transient charge pumping on partially depleted SOI MOSFETs S Okhonin, M Nagoga, P Fazan IEEE Electron Device Letters 23 (5), 279-281, 2002 | 45 | 2002 |
| Ultra-scaled Z-RAM cell S Okhonin, M Nagoga, CW Lee, JP Colinge, A Afzalian, R Yan, ... 2008 IEEE International SOI Conference, 157-158, 2008 | 36 | 2008 |
| Techniques for providing a semiconductor memory device S Okhonin, VI Koldiaev, M Nagoga, Y Luthra US Patent 8,537,610, 2013 | 32 | 2013 |
| Highly scalable Z-RAM with remarkably long data retention for DRAM application TS Jang, JS Kim, SM Hwang, YH Oh, KM Rho, SJ Chung, SO Chung, ... 2009 Symposium on VLSI Technology, 234-235, 2009 | 19 | 2009 |
| Retention characteristics of zero-capacitor RAM (Z-RAM) cell based on FinFET and tri-gate devices C Bassin, P Fazan, W Xiong, CR Cleavelin, T Schulz, K Schruefer, ... 2005 IEEE International SOI Conference Proceedings, 203-204, 2005 | 19 | 2005 |
| Refreshing data of memory cells with electrically floating body transistors E Carman, M Nagoga, S Okhonin US Patent 8,194,487, 2012 | 17 | 2012 |
| SOI capacitor-less 1-transistor DRAM sensing scheme with automatic reference generation M Blagojevic, M Pastre, M Kayal, P Fazan, S Okhonin, M Nagoga, ... 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No …, 2004 | 14 | 2004 |
| A leakage current model for SOI based floating body memory that includes the Poole-Frenkel effect A Nayfeh, V Koldyaev, P Beaud, M Nagoga, S Okhonin 2008 IEEE International SOI Conference, 75-76, 2008 | 11 | 2008 |
