| Modeling cache coherence to expose interference N Sensfelder, J Brunel, C Pagetti ECRTS 2019, 2019 | 24 | 2019 |
| On how to identify cache coherence: Case of the NXP QorIQ T4240 N Sensfelder, J Brunel, C Pagetti 32nd Euromicro Conference on Real-Time Systems (ECRTS 2020), 13: 1-13: 22, 2020 | 20 | 2020 |
| A model-based certification approach for multi/many-core embedded systems P Bieber, F Boniol, Y Bouchebaba, J Brunel, C Pagetti, O Poitou, ... ERTS 2018, 2018 | 16 | 2018 |
| PHYLOG certification methodology: a sane way to embed multi-core processors F Boniol, Y Bouchebaba, J Brunel, K Delmas, T Loquen, AM Gonzalez, ... 10th European Congress on Embedded Real Time Software and Systems (ERTS 2020), 2020 | 10 | 2020 |
| Identification of multi-core interference F Boniol, C Pagetti, N Sensfelder 2019 IEEE 19th International Symposium on High Assurance Systems Engineering …, 2019 | 8 | 2019 |
| PHYLOG: a model-based certification framework F Boniol, Y Bouchebaba, J Brunel, K Delmas, C Pagetti, T Polacsek, ... 2018 IEEE/AIAA 37th Digital Avionics Systems Conference (DASC), 1-9, 2018 | 5 | 2018 |
| A service-based modelling approach to ease the certification of multi-core COTS processors F Boniol, Y Bouchebaba, J Brunel, K Delmas, C Pagetti, T Polacsek, ... SAE AEROTECH® Europe, 2019 | 4 | 2019 |
| Inference of channel priorities for asynchronous communication N Sensfelder, A Hurault, P Quéinnec Distributed Computing and Artificial Intelligence, 14th International …, 2018 | 3 | 2018 |
| Modeling cache coherence to expose interference (artifact) N Sensfelder, J Brunel, C Pagetti Dagstuhl Artifacts Series 5 (1), 7: 1-7: 2, 2019 | 2 | 2019 |
| Analysis and control of cache coherence interference in multi-core cots platforms N Sensfelder Toulouse, ISAE, 2021 | | 2021 |
| Analyse et contrôle des interférences liées à la cohérence de cache dans les multi-coeurs COTS N Sensfelder Toulouse, ISAE, 2021 | | 2021 |
| 32nd Euromicro Conference on Real-Time Systems (ECRTS 2020) G Schwäricke, T Kloda, G Gracioli, M Bertogna, M Caccamo, A Saifullah, ... Schloss Dagstuhl-Leibniz-Zentrum für Informatik GmbH, 2020 | | 2020 |
| Asynchronous Communication with Channel Priorities N Sensfelder, A Hurault, P Quéinnec | | |