| CorNET: Deep learning framework for PPG-based heart rate estimation and biometric identification in ambulant environment D Biswas, L Everson, M Liu, M Panwar, BE Verhoef, S Patki, CH Kim, ... IEEE transactions on biomedical circuits and systems 13 (2), 282-291, 2019 | 288 | 2019 |
| A fully integrated digital LDO with built-in adaptive sampling and active voltage positioning using a beat-frequency quantizer S Kundu, M Liu, SJ Wen, R Wong, CH Kim IEEE journal of solid-state circuits 54 (1), 109-120, 2018 | 79 | 2018 |
| A scalable time-based integrate-and-fire neuromorphic core with brain-inspired leak and local lateral inhibition capabilities M Liu, LR Everson, CH Kim 2017 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2017 | 46 | 2017 |
| A fully integrated 40pF output capacitor beat-frequency-quantizer-based digital LDO with built-in adaptive sampling and active voltage positioning S Kundu, M Liu, R Wong, SJ Wen, CH Kim 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 308-310, 2018 | 45 | 2018 |
| A data remanence based approach to generate 100% stable keys from an sram physical unclonable function M Liu, C Zhou, Q Tang, KK Parhi, CH Kim 2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017 | 44 | 2017 |
| An energy-efficient one-shot time-based neural network accelerator employing dynamic threshold error correction in 65 nm LR Everson, M Liu, N Pande, CH Kim IEEE Journal of Solid-State Circuits 54 (10), 2777-2785, 2019 | 34 | 2019 |
| An embedded NAND flash-based compute-in-memory array demonstrated in a standard logic process M Kim, M Liu, LR Everson, CH Kim IEEE Journal of Solid-State Circuits 57 (2), 625-638, 2021 | 30 | 2021 |
| A 3D NAND flash ready 8-bit convolutional neural network core demonstrated in a standard logic process M Kim, M Liu, L Everson, G Park, Y Jeon, S Kim, S Lee, S Song, CH Kim 2019 IEEE International Electron Devices Meeting (IEDM), 38.3. 1-38.3. 4, 2019 | 21 | 2019 |
| A 104.8 TOPS/W one-shot time-based neuromorphic chip employing dynamic threshold error correction in 65nm LR Everson, M Liu, N Pande, CH Kim 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), 273-276, 2018 | 14 | 2018 |
| Real-time hr estimation from wrist ppg using binary lstms LG Rocha, M Liu, D Biswas, BE Verhoef, S Bampi, CH Kim, C Van Hoof, ... 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-4, 2019 | 13 | 2019 |
| A powerless and non-volatile counterfeit IC detection sensor in a standard logic process based on an exposed floating-gate array M Liu, CH Kim 2017 Symposium on VLSI Technology, T102-T103, 2017 | 12 | 2017 |
| A system for validating resistive neural network prototypes B Hoskins, W Ma, M Fream, O Yousuf, M Daniels, J Goodwill, ... International Conference on Neuromorphic Systems 2021, 1-5, 2021 | 7 | 2021 |
| Stable memory cell identification for hardware security M Liu, C Zhou, KK Parhi, H Kim US Patent 11,309,018, 2022 | 6 | 2022 |
| Demonstration of a passive IC tamper sensor based on an exposed floating gate device in a standard logic process M Liu, CH Kim IEEE Transactions on Electron Devices 66 (6), 2735-2740, 2019 | 4 | 2019 |
| A 2.1 pJ/bit, 8 Gb/s ultra-low power in-package serial link featuring a time-based front-end and a digital equalizer PW Chiu, M Liu, Q Tang, CH Kim 2018 IEEE Asian solid-state circuits conference (A-SSCC), 187-190, 2018 | 4 | 2018 |
| Stable memory cell identification for hardware security M Liu, C Zhou, KK Parhi, H Kim US Patent 11,769,548, 2023 | | 2023 |
| Real-time HR estimation from wrist PPG using binary LSTMs L Giacomini Rocha, M Liu, D Biswas, B Verhoef, M Verhelst, S Bampi, ... | | 2019 |
| Energy-Efficient Neural Network Hardware Design and Circuit Techniques to Enhance Hardware Security M Liu University of Minnesota, 2019 | | 2019 |
Chris H. KimMcknight Presidential Endowed Chair, University of MinnesotaVerified email at umn.edu
