Dr. Nandakishor Yadav

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Dr. Santosh Kumar VishvakarmaIndian Institute of Technology IndoreVerified email at iiti.ac.in
Ambika Prasad ShahAssistant Professor, Electrical Engineering Department, Indian Institute of Technology JammuVerified email at iitjammu.ac.in
Dr. ANKUR BEOHARSEEE, VIT Bhopal UniversityVerified email at vitbhopal.ac.in
Dr. Manisha PattanaikProfessor, ABV-IIITM Gwalior (INDIA)Verified email at iiitm.ac.in
Thomas KämpfeTU Braunschweig | Fraunhofer IPMS - Center Nanoelectronic TechnologiesVerified email at tu-braunschweig.de
Yukui LuoBinghamton UniversityVerified email at binghamton.edu
Mahmoud AlashiResearch AssistantVerified email at hawk.iit.edu
Maximilian LedererFraunhofer IPMS - CNTVerified email at ipms.fraunhofer.de
Victoria Heekyung KimIllinois Institute of TechnologyVerified email at hawk.iit.edu
Suneel DuttNational Institute of Technology (NIT) JalandharVerified email at nitj.ac.in
Sourav DeCollege of Semiconductor Research, National Tsing Hua UniversityVerified email at mx.nthu.edu.tw
Shikha JainPrincipal Research Engineer, Western DigitalVerified email at wdc.com
nanda sanjuMaharshi Dayanand University, RohtakVerified email at mdurohtak.ac.in
Vikas VijayvargiyaVIT VILLOREVerified email at vit.ac.in
Kyuwon Ken ChoiProfessor of ECE, Illinois Institute of TechnologyVerified email at iit.edu
David LehningerFraunhofer IPMS CNTVerified email at ipms.fraunhofer.de
Hannes MähneX-FAB Dresden GmbH & Co. KGVerified email at xfab.com
Pooran SinghEcole Centrale School of Engineering, Mahindra UniversitVerified email at mahindrauniversity.edu.in
Dr. Maisagalla GopalNIT KarnatakaVerified email at nitk.edu.in
GOPAL RAUTC-DAC Bangalore, IndiaVerified email at iiti.ac.in

Dr. Nandakishor Yadav

Other namesNand kishore yadav

Fraunhofer Institute fo Photonics Microsystems

Verified email at ipms.fraunhofer.de - Homepage

Ferroelectric Memory and Peripheral Circuit Design


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A novel FPGA accelerator design for real-time and ultra-low power deep convolutional neural networks compared with titan X GPU S Li, Y Luo, K Sun, N Yadav, KK Choi IEEE Access 8, 105455-105471, 2020	57	2020
Stable, reliable, and bit-interleaving 12T SRAM for space applications: A device circuit co-design N Yadav, AP Shah, SK Vishvakarma IEEE Transactions on Semiconductor Manufacturing 30 (3), 276-284, 2017	57	2017
A comprehensive survey of fake news in social networks: Attributes, features, and detection approaches MR Kondamudi, SR Sahoo, L Chouhan, N Yadav Journal of King Saud University-Computer and Information Sciences 35 (6), 101571, 2023	54	2023
On-chip Adaptive Body Bias for Reducing the Impact of NBTI on 6T SRAM Cells AP Shah, N Yadav, SK Vishvakerma IEEE Transactions on Semiconductor Manufacturing 31 (2), 1-8, 2018	48	2018
Process variation and NBTI resilient Schmitt trigger for stable and reliable circuits AP Shah, N Yadav, A Beohar, SK Vishvakarma IEEE Transactions on Device and Materials Reliability 18 (4), 546-554, 2018	28	2018
Low-power RTL code generation for advanced CNN algorithms toward object detection in autonomous vehicles Y Kim, H Kim, N Yadav, S Li, KK Choi Electronics 9 (3), 478, 2020	21	2020
An efficient NBTI sensor and compensation circuit for stable and reliable SRAM cells AP Shah, N Yadav, A Beohar, SK Vishvakarma Microelectronics Reliability 87, 15-23, 2018	21	2018
Analysis of trap‐assisted tunnelling in asymmetrical underlap 3D‐cylindrical GAA‐TFET based on hetero‐spacer engineering for improved device reliability A Beohar, N Yadav, SK Vishvakarma Micro & Nano Letters 12 (12), 982-986, 2017	19	2017
Systematically Optimized Ketoprofen-Loaded Novel Proniosomal Formulation for Periodontitis: In Vitro Characterization and In Vivo Pharmacodynamic Evaluation NK Yadav, S Nanda, G Sharma, OP Katare AAPS PharmSciTech 18 (5), 1863-1880, 2017	19	2017
Ultra-low power and high-throughput SRAM design to enhance AI computing ability in autonomous vehicles Y Kim, S Patel, H Kim, N Yadav, KK Choi Electronics 10 (3), 256, 2021	18	2021
Analog/RF characteristics of a 3D-Cyl underlap GAA-TFET based on a Ge source using fringing-field engineering for low-power applications A Beohar, N Yadav, AP Shah, SK Vishvakarma Journal of Computational Electronics 17 (4), 1650-1657, 2018	18	2018
SPICE compatible semi-empirical compact model for ferroelectric hysteresis M Lederer, R Olivo, N Yadav, S De, K Seidel, LM Eng, T Kämpfe Solid-State Electronics 199, 108501, 2023	13	2023
Novel CNN-based AP2D-net accelerator: An area and power efficient solution for real-time applications on mobile FPGA S Li, K Sun, Y Luo, N Yadav, K Choi Electronics 9 (5), 832, 2020	12	2020
Double-gate FinFET process variation aware 10T SRAM cell topology design and analysis N Yadav, S Dutt, M Pattnaik, GK Sharma 2013 European Conference on Circuit Theory and Design (ECCTD), 1-4, 2013	11	2013
Design of a voltage to time converter with high conversion gain for reliable and secure autonomous vehicles N Yadav, Y Kim, M Alashi, K Ken Choi Electronics 9 (3), 384, 2020	9	2020
NMOS only Schmitt trigger circuit for NBTI resilient CMOS circuits AP Shah, N Yadav, A Beohar, SK Vishvakarma Electronics Letters 54 (14), 868-870, 2018	9	2018
NBTI aware IG-FinFET based SRAM design using adaptable trip-point sensing technique N Yadav, S Jain, M Pattanaik, GK Sharma Proceedings of the 2014 IEEE/ACM International Symposium on Nanoscale …, 2014	9	2014
A reactive and on-chip sensor circuit for NBTI and PBTI resilient SRAM design N Yadav, Y Kim, M Alashi, KK Choi Electronics 9 (2), 326, 2020	7	2020
SUBHDIP: process variations tolerant subthreshold Darlington pair‐based NBTI sensor circuit AP Shah, N Yadav, A Beohar, SK Vishvakarma IET Computers & Digital Techniques 13 (3), 243-249, 2019	7	2019
A novel ultra-low power 8T SRAM-based compute-in-memory design for binary neural networks Y Kim, S Li, N Yadav, KK Choi Electronics 10 (17), 2181, 2021	6	2021

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