Binary translation in asymmetric multiprocessor system K Yamada, R Ronen, W Li, B Ginzburg, G Haber, K Levit-Gurevich, ... US Patent App. 13/993,042, 2014 | 34 | 2014 |
Complementing missing and inaccurate profiling using a minimum cost circulation algorithm R Levin, I Newman, G Haber High Performance Embedded Architectures and Compilers: Third International …, 2008 | 30 | 2008 |
Optimization opportunities created by global data reordering G Haber, M Klausner, V Eisenberg, B Mendelson, M Gurevich International Symposium on Code Generation and Optimization, 2003. CGO 2003 …, 2003 | 24 | 2003 |
Parallel solutions of simple indexed recurrence equations Y Ben-Asher, G Haber IEEE Transactions on Parallel and Distributed Systems 12 (1), 22-37, 2001 | 23 | 2001 |
Core switching acceleration in asymmetric multiprocessor system K Yamada, B Ginzburg, W Li, R Ronen, E Natanzon, K Levit-Gurevich, ... US Patent 9,348,594, 2016 | 22 | 2016 |
Feedback based post-link optimization for large subsystems EA Henis, G Haber, M Klausner, A Warshavsky Second Workshop on Feedback Directed Optimization, 13-20, 1999 | 22 | 1999 |
Method and apparatus for performance efficient ISA virtualization using dynamic partial binary translation G Haber, KK Levit-Gurevich, E Natanzon, B Ginzburg, A Elhanan, ... US Patent 9,141,361, 2015 | 20 | 2015 |
Reliable post-link optimizations based on partial information G Haber, EA Henis, V Eisenberg Proceedings of the 3rd Workshop on Feedback Directed and Dynamic Optimizations, 2000 | 16 | 2000 |
Branch Predictor with Branch Resolution Code Injection L Peled, G Haber, Y Sazeides US Patent App. 15/385,011, 2018 | 11 | 2018 |
Aggressive function inlining with global code reordering O Boehm, D Citron, G Haber, M Klausner, R Levin IBM Technical Paper, 2006 | 11 | 2006 |
Apparatus and method for improving power-performance using a software analysis routine K Levit-Gurevich, G Haber US Patent 10,209,764, 2019 | 10 | 2019 |
Parallelization hints via code skeletonization C Aguston, Y Ben Asher, G Haber Proceedings of the 19th ACM SIGPLAN symposium on Principles and practice of …, 2014 | 9 | 2014 |
Reducing program image size by extracting frozen code and data D Citron, G Haber, R Levin Proceedings of the 4th ACM international conference on Embedded software …, 2004 | 8 | 2004 |
Refactoring techniques for aggressive object inlining in Java applications Y Ben Asher, T Gal, G Haber, M Zalmanovici Automated Software Engineering 19, 97-136, 2012 | 7 | 2012 |
Aggressive function inlining: preventing loop blockings in the instruction cache Y Ben Asher, O Boehm, D Citron, G Haber, M Klausner, R Levin, ... International Conference on High-Performance Embedded Architectures and …, 2008 | 7 | 2008 |
On the usage of simulators to detect inefficiency of parallel programs caused by “bad” schedulings: The Simparc approach Y Ben-Asher, G Haber Journal of Systems and Software 33 (3), 313-327, 1996 | 7 | 1996 |
Efficient parallel solutions of linear algebraic circuits Y Ben-Asher, G Haber Journal of Parallel and Distributed Computing 64 (1), 163-172, 2004 | 6 | 2004 |
Apparatus and method for speculative conditional move operation A Aboud, G Haber, JW Stark IV US Patent 10,620,961, 2020 | 5 | 2020 |
A study of conflicting pairs of compiler optimizations YB Asher, G Haber, E Stein 2017 IEEE 11th International Symposium on Embedded Multicore/Many-core …, 2017 | 5 | 2017 |
Method and storage medium for building very large executable programs J Civlin, G Haber, B Mendelson, D Bernstein, I Nahshon US Patent 6,145,125, 2000 | 3 | 2000 |