Arseniy Vitkovskiy

Arseniy Vitkovskiy

Nikhef - the Dutch National Institute for Subatomic Physics, Amsterdam
Verified email at ars-vita.ru
Cited by 12939
Computer Architecture On-Chip Networks SoC Design
Christopher Nitta

Christopher Nitta

Associate Professor of Teaching, University of California, Davis
Verified email at ucdavis.edu
Cited by 980
Computer Science Education Nanophotonics On-Chip Networks
Rohit Sunkam Ramanujam

Rohit Sunkam Ramanujam

ASIC Engineer Fungible, Graduate Student Researcher UCSD 2006-2011
Cited by 680
On-chip Networks
Naveed Khan Baloch

Naveed Khan Baloch

University of Engineering and Technology Taxila Pakistan
Verified email at uettaxila.edu.pk
Cited by 549
Embedded Systems Digital Design On-Chip networks Fault tolerant designs Self healing systems
Frank Olaf Sem-jacobsen

Frank Olaf Sem-jacobsen

System Engineer, Statsat AS
Verified email at ifi.uio.no
Cited by 443
Computer networks Interconnection networks routing fault tolerance on-chip networks
Mojtaba Valinataj

Mojtaba Valinataj

Associate Professor, Babol Noshirvani University of Technology, IRAN
Verified email at nit.ac.ir
Cited by 414
Fault-Tolerant Systems DNN Accelerators Computer Arithmetic On-chip Networks
Farnaz Fotovvatikhah

Farnaz Fotovvatikhah

Ph.D candidate
Verified email at siswa.um.edu.my
Cited by 412
Computer On-Chip Networks Artificial Intelligence Machine Learning Prediction Models
Jacob Postman

Jacob Postman

Verified email at eecs.oregonstate.edu
Cited by 261
Low-voltage Swing Signaling On-chip Networks
Yaswanth Tavva

Yaswanth Tavva

National University of Singapore
Verified email at u.nus.edu
Cited by 236
low-power designs Computer architecture on-chip networks
Rimpy Bishnoi

Rimpy Bishnoi

Ph.D(MNIT Jaipur)
Cited by 81
On-chip networks LBDR.
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