Ki Chul Chun

Ki Chul Chun

Samsung Electronics
Verified email at samsung.com
Cited by 1464
HBM DRAM STT-MRAM
Chunseok Jeong

Chunseok Jeong

engineer, SK hynix
Verified email at sk.com
Cited by 1206
DRAM HBM PIM analog circuit
Nathaniel Meier

Nathaniel Meier

Micron Technology
Verified email at micron.com
Cited by 455
HBM DRAM Rowhammer Memory Security
Jinhyung Lee

Jinhyung Lee

Sk hynix
Verified email at sk.com
Cited by 411
high speed IO equalizer HBM
Sang Hoon Shin

Sang Hoon Shin

Principal Design Engineer, Micron Technology Inc.
Verified email at ieee.org
Cited by 395
DRAM Circuit Design HBM 3DS DFT BIST
Sai Boyapati

Sai Boyapati

Director of Technology, AMD
Verified email at amd.com
Cited by 262
Semiconductor Packaging Chiplets HBM
Li WANG (王力)

Li WANG (王力)

Hong Kong University of Science and Technology
Verified email at connect.ust.hk
Cited by 238
mmWave Phased-Array HBM Optical Transceiver PLL
Javed S Gaggatur

Javed S Gaggatur

Technical Lead / Manager-High Speed Circuits
Verified email at intel.com
Cited by 215
Analog/Mixed Signal/RFIC Design HBM DDR Memory Interface VCO/CTLE/DLL
Manho Lee

Manho Lee

Samsung Electronics
Verified email at samsung.com
Cited by 203
SI/PI SerDes DRAM I/F Packaging HBM
Srini Chandrasekaran

Srini Chandrasekaran

Cadence Design Systems Inc.
Verified email at cadence.com
Cited by 203
Memory interface - LP/DDRx HBM Serial links Wired interfaces
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