| Scan cell ordering for low power BIST M Bellos, D Bakalis, D Nikolos IEEE Computer Society Annual Symposium on VLSI, 281-284, 2004 | 24 | 2004 |
| An efficient test vector ordering method for low power testing X Kavousianos, D Bakalis, M Bellos, D Nikolos IEEE Computer Society Annual Symposium on VLSI, 285-288, 2004 | 20 | 2004 |
| Test set embedding based on phase shifters M Bellos, D Kagaris, D Nikolos European Dependable Computing Conference, 90-101, 2002 | 16 | 2002 |
| A core generator for arithmetic cores and testing structures with a network interface D Bakalis, KD Adaos, D Lymperopoulos, M Bellos, HT Vergos, GP Alexiou, ... Journal of Systems Architecture 52 (1), 1-12, 2006 | 12 | 2006 |
| Low power testing by test vector ordering with vector repetition M Bellos, D Bakalis, D Nikolos, X Kavousianos International Symposium on Signals, Circuits and Systems. Proceedings, SCS …, 2004 | 11 | 2004 |
| Deterministic BIST for RNS adders HT Vergos, D Nikolos, M Bellos, C Efstathiou IEEE Transactions on Computers 52 (7), 896-906, 2003 | 6 | 2003 |
| Path delay fault testing of benes multistage interconnection networks HT Vergos, M Bellos, D Nikolos ICECS'99. Proceedings of ICECS'99. 6th IEEE International Conference on …, 1999 | 2 | 1999 |
| Low power test set embedding based on phase shifters M Bellos, D Kagaris, D Nikolos IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings., 155-160, 2003 | 1 | 2003 |
| Path delay fault testing of a class of circuit-switched multistage interconnection networks M Bellos, D Nikolos, HT Vergos Dependable Computing—EDCC-3: Third European Dependable Computing Conference …, 1999 | 1 | 1999 |
| Deterministic test vector compression/decompression using an embedded processor M Bellos, D Nikolos European Dependable Computing Conference, 318-331, 2005 | | 2005 |
| DV-TSE: Difference Vector Based Test Set Embedding. M Bellos, X Kavousianos, D Nikolos, D Kagaris VLSI-SOC, 343-, 2003 | | 2003 |
| Session 7: Hardware Testing Chair: Raimund Ubar, Tallin Technical University, Estonia-Path Delay Fault Testing of a Class of Circuit-Switched Multistage Interconnection Networks M Bellos, D Nikolos, HT Vergos Lecture Notes in Computer Science 1667, 267-282, 1999 | | 1999 |
| A Macro Generator for Arithmetic Cores D Bakalis, M Bellos, HT Vergos, D Nikolos, G Alexiou | | |
| VECTOR REPETITION AND MODIFICATION FOR PEAK POWER REDUCTION IN VLSI TESTING M Bellos, D Bakalis, D Nikolos, X Kavousianos | | |
| On-Line Path Delay Fault Testing of Omega MINs M Bellos, E Kalligeros, D Nikolos, HT Vergos | | |
