| A 10-Gb/s 5-tap DFE/4-tap FFE transceiver in 90-nm CMOS technology JF Bulzacchelli, M Meghelli, SV Rylov, W Rhee, AV Rylyakov, HA Ainspan, ... IEEE Journal of Solid-State Circuits 41 (12), 2885-2900, 2006 | 319 | 2006 |
| A 28-Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32-nm SOI CMOS technology JF Bulzacchelli, C Menolfi, TJ Beukema, DW Storaska, J Hertle, ... IEEE Journal of Solid-State Circuits 47 (12), 3232-3248, 2012 | 244 | 2012 |
| Circuits and methods for implementing sub-integer-N frequency dividers using phase rotators BA Floyd, SV Rylov US Patent 7,486,145, 2009 | 120 | 2009 |
| Josephson output interfaces for RSFQ circuits OA Mukhanov, SV Rylov, DV Gaidarenko, NB Dubash, VV Borzenets IEEE transactions on applied superconductivity 7 (2), 2826-2831, 1997 | 97 | 1997 |
| A 10-Gb/s two-dimensional eye-opening monitor in 0.13-/spl mu/m standard CMOS B Analui, A Rylyakov, S Rylov, M Meghelli, A Hajimiri IEEE Journal of Solid-State Circuits 40 (12), 2689-2699, 2005 | 94 | 2005 |
| An 8x 10-Gb/s source-synchronous I/O system based on high-density silicon carrier interconnects TO Dickson, Y Liu, SV Rylov, B Dang, CK Tsang, PS Andry, ... IEEE Journal of Solid-State Circuits 47 (4), 884-896, 2012 | 90 | 2012 |
| An adaptively pipelined mixed synchronous-asynchronous digital FIR filter chip operating at 1.3 gigahertz M Singh, JA Tierno, A Rylyakov, S Rylov, SM Nowick IEEE transactions on very large scale integration (VLSI) systems 18 (7 …, 2009 | 88 | 2009 |
| RSFQ logic arithmetic OA Mukhanov, SV Rylov, VK Semonov, SV Vyshenskii IEEE Transactions on Magnetics 25 (2), 857-860, 1989 | 84 | 1989 |
| A 25 Gb/s burst-mode receiver for low latency photonic switch networks A Rylyakov, JE Proesel, S Rylov, BG Lee, JF Bulzacchelli, A Ardey, ... IEEE Journal of Solid-State Circuits 50 (12), 3120-3132, 2015 | 77 | 2015 |
| A 10Gb/s 5-tap-DFE/4-tap-FFE transceiver in 90nm CMOS M Meghelli, S Rylov, J Bulzacchelli, W Rhee, A Rylyakov, H Ainspan, ... 2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006 | 75 | 2006 |
| A 32 Gb/s, 4.7 pJ/bit optical link with− 11.7 dBm sensitivity in 14-nm FinFET CMOS JE Proesel, Z Toprak-Deniz, A Cevrero, I Ozkaya, S Kim, DM Kuchta, ... IEEE Journal of Solid-State Circuits 53 (4), 1214-1226, 2017 | 70 | 2017 |
| Superconducting high-resolution A/D converter based on phase modulation and multichannel timing arbitration SV Rylov, RP Robertazzi IEEE Transactions on Applied Superconductivity 5 (2), 2260-2263, 1995 | 69 | 1995 |
| A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology GR Gangasani, CM Hsu, JF Bulzacchelli, S Rylov, T Beukema, D Freitas, ... IEEE journal of solid-state circuits 47 (8), 1828-1841, 2012 | 64 | 2012 |
| Reversible conveyer computation in array of parametric quantrons K Likharev, S Rylov, V Semenov IEEE Transactions on Magnetics 21 (2), 947-950, 1985 | 56 | 1985 |
| Progress in design of improved high dynamic range analog-to-digital converters A Inamdar, S Rylov, A Talalaevskii, A Sahu, S Sarwana, DE Kirichenko, ... IEEE transactions on applied superconductivity 19 (3), 670-675, 2009 | 54 | 2009 |
| A superconductive flash digitizer with on-chip memory SB Kaplan, PD Bradley, DK Brock, D Gaidarenko, D Gupta, WQ Li, ... IEEE transactions on applied superconductivity 9 (2), 3020-3025, 1999 | 52 | 1999 |
| Superconducting analog amplifier circuits SV Rylov US Patent 5,936,458, 1999 | 49 | 1999 |
| Automated calculation of mutual inductance matrices of multilayer superconductor integrated circuits PI Bunyk Ext. Abst. ISEC, 1993 62, 1993 | 49 | 1993 |
| A 1.4 pJ/bit, power-scalable 16× 12 Gb/s source-synchronous I/O with DFE receiver in 32 nm SOI CMOS technology TO Dickson, Y Liu, SV Rylov, A Agrawal, S Kim, PH Hsieh, JF Bulzacchelli, ... IEEE Journal of Solid-State Circuits 50 (8), 1917-1931, 2015 | 47 | 2015 |
| A 78mW 11.1 Gb/s 5-tap DFE receiver with digitally calibrated current-integrating summers in 65nm CMOS JF Bulzacchelli, TO Dickson, ZT Deniz, HA Ainspan, BD Parker, ... 2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009 | 45 | 2009 |
