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Matteo Monchiero
Matteo Monchiero
Snowflake Inc.
Bestätigte E-Mail-Adresse bei snowflake.com
Titel
Zitiert von
Zitiert von
Jahr
Corona: System implications of emerging nanophotonic technology
D Vantrease, R Schreiber, M Monchiero, M McLaren, NP Jouppi, ...
ACM SIGARCH Computer Architecture News 36 (3), 153-164, 2008
8912008
A comprehensive memory modeling tool and its application to the design and analysis of future memory hierarchies
S Thoziyoor, JH Ahn, M Monchiero, JB Brockman, NP Jouppi
ACM SIGARCH Computer Architecture News 36 (3), 51-62, 2008
3252008
COTSon: infrastructure for full system simulation
E Argollo, A Falcón, P Faraboschi, M Monchiero, D Ortega
ACM SIGOPS Operating Systems Review 43 (1), 52-61, 2009
2812009
Power management of datacenter workloads using per-core power gating
J Leverich, M Monchiero, V Talwar, P Ranganathan, C Kozyrakis
IEEE Computer Architecture Letters 8 (2), 48-51, 2009
1792009
AES power attack based on induced cache miss and countermeasure
G Bertoni, V Zaccaria, L Breveglieri, M Monchiero, G Palermo
International Conference on Information Technology: Coding and Computing …, 2005
1612005
Design space exploration for multicore architectures: a power/performance/thermal view
M Monchiero, R Canal, A González
Proceedings of the 20th annual international conference on Supercomputing …, 2006
1262006
Exploration of distributed shared memory architectures for NoC-based multiprocessors
M Monchiero, G Palermo, C Silvano, O Villa
Journal of Systems Architecture 53 (10), 719-732, 2007
1022007
How to simulate 1000 cores
M Monchiero, JH Ahn, A Falcón, D Ortega, P Faraboschi
ACM SIGARCH Computer Architecture News 37 (2), 10-19, 2009
892009
Power/performance/thermal design-space exploration for multicore architectures
M Monchiero, R Canal, A Gonzalez
IEEE Transactions on Parallel and Distributed Systems 19 (5), 666-681, 2008
872008
Software application testing
F Balestrieri, M Monchiero
US Patent 9,262,306, 2016
792016
Efficient synchronization for embedded on-chip multiprocessors
M Monchiero, G Palermo, C Silvano, O Villa
IEEE Transactions on very large scale integration (VLSI) systems 14 (10 …, 2006
642006
A pipelined fast 2D-DCT accelerator for FPGA-based SoCs
A Tumeo, M Monchiero, G Palermo, F Ferrandi, D Sciuto
IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 331-336, 2007
602007
A dual-priority real-time multiprocessor system on fpga for automotive applications
A Tumeo, M Branca, L Camerini, M Ceriani, G Palermo, F Ferrandi, ...
Proceedings of the conference on Design, automation and test in Europe, 1039 …, 2008
352008
Prototyping pipelined applications on a heterogeneous fpga multiprocessor virtual platform
A Tumeo, M Branca, L Camerini, M Ceriani, M Monchiero, G Palermo, ...
2009 Asia and South Pacific Design Automation Conference, 317-322, 2009
312009
An efficient synchronization technique for multiprocessor systems on-chip
M Monchiero, G Palermo, C Silvano, O Villa
Proceedings of the 2005 Workshop on MEmory performance: DEaling with …, 2005
312005
Power/performance hardware optimization for synchronization intensive applications in MPSoCs
M Monchiero, G Palermo, C Silvano, O Villa
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
282006
An interrupt controller for FPGA-based multiprocessors
A Tumeo, M Branca, L Camerini, M Monchiero, G Palermo, F Ferrandi, ...
2007 International Conference on Embedded Computer Systems: Architectures …, 2007
252007
A design kit for a fully working shared memory multiprocessor on FPGA
A Tumeo, M Monchiero, G Palermo, F Ferrandi, D Sciuto
Proceedings of the 17th ACM Great Lakes symposium on VLSI, 219-222, 2007
252007
Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA
S Borgio, D Bosisio, F Ferrandi, M Monchiero, MD Santambrogio, ...
2006 International Conference on Embedded Computer Systems: Architectures …, 2006
212006
Power-aware branch prediction techniques: A compiler-hints based approach for VLIW processors
M Monchiero, G Palermo, M Sami, C Silvano, V Zaccaria, R Zafalon
Proceedings of the 14th ACM Great Lakes symposium on VLSI, 440-443, 2004
212004
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