True random number generator integration in a resistive RAM memory array using input current limitation H Aziza, J Postel-Pellerin, H Bazzi, P Canet, M Moreau, V Della Marca, ...
IEEE Transactions on Nanotechnology 19, 214-222, 2020
48 2020 Charge trapping in alumina and its impact on the operation of metal-alumina-nitride-oxide-silicon memories: Experiments and simulations A Padovani, L Larcher, V Della Marca, P Pavan, H Park, G Bersuker
Journal of applied physics 110 (1), 2011
31 2011 Temperature effects on metal-alumina-nitride-oxide-silicon memory operations A Padovani, L Larcher, D Heh, G Bersuker, V Della Marca, P Pavan
Applied Physics Letters 96 (22), 2010
28 2010 Scalability of split-gate charge trap memories down to 20nm for low-power embedded memories L Masoero, G Molas, F Brun, M Gély, JP Colonna, V Della Marca, O Cueto, ...
2011 International Electron Devices Meeting, 9.5. 1-9.5. 4, 2011
20 2011 True random number generation exploiting SET voltage variability in resistive RAM memory arrays J Postel-Pellerin, H Bazzi, H Aziza, P Canet, M Moreau, V Della Marca, ...
2019 19th Non-Volatile Memory Technology Symposium (NVMTS), 1-5, 2019
18 2019 Investigation of x -Based RRAM Devices for Neuromorphic Applications C Sung, A Padovani, B Beltrando, D Lee, M Kwak, S Lim, L Larcher, ...
IEEE Journal of The Electron Devices Society 7, 404-408, 2019
18 2019 Comprehensive phase-change memory compact model for circuit simulation C Pigot, M Bocquet, F Gilibert, M Reyboz, O Cueto, V Della Marca, ...
IEEE Transactions on Electron Devices 65 (10), 4282-4289, 2018
16 2018 Push the flash floating gate memories toward the future low energy application V Della Marca, G Just, A Regnier, JL Ogier, R Simola, S Niel, ...
Solid-State Electronics 79, 210-217, 2013
16 2013 Investigation of trapping/detrapping mechanisms in Al2 O3 electron/hole traps and their influence on TANOS memory operations L Larcher, A Padovani, V della Marca, P Pavan, A Bertacchini
Proceedings of 2010 International Symposium on VLSI Technology, System and …, 2010
16 2010 Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories V Della Marca, J Postel-Pellerin, G Just, P Canet, JL Ogier
Microelectronics Reliability 54 (9-10), 2262-2265, 2014
14 2014 Role of holes and electrons during erase of TANOS memories: evidences for dipole formation and its impact on reliability L Vandelli, A Padovani, L Larcher, A Arreghini, M Jurczak, J Van Houdt, ...
2010 IEEE International Reliability Physics Symposium, 731-737, 2010
12 2010 Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations M Chambonneau, S Souiki-Figuigui, P Chiquet, V Della Marca, ...
Applied Physics Letters 110 (16), 2017
8 2017 Real-time switching dynamics in STT-MRAM N Yazigy, J Postel-Pellerin, V Della Marca, K Terziyan, RC Sousa, ...
IEEE Journal of the Electron Devices Society 10, 490-494, 2022
6 2022 Experimental analysis on stochastic behavior of preswitching time in STT-MRAM N Yazigy, J Postel-Pellerin, V Della Marca, K Terziyan, S Nadifi, ...
Microelectronics Reliability 138, 114677, 2022
5 2022 Experimental study to push the Flash floating gate memories toward low energy applications V Della Marca, A Regnier, JL Ogier, R Simola, S Niel, J Postel-Pellerin, ...
2011 International Semiconductor Device Research Symposium (ISDRS), 1-2, 2011
5 2011 Energy consumption optimization in nonvolatile silicon nanocrystal memories V Della Marca, J Amouroux, J Delalleau, L Lopez, JL Ogier, ...
CAS 2011 Proceedings (2011 International Semiconductor Conference) 2, 339-342, 2011
5 2011 Phenomenological modelling of non-volatile memory threshold voltage shift induced by nonlinear ionization with a femtosecond laser P Chiquet, M Chambonneau, V Della Marca, J Postel-Pellerin, P Canet, ...
Scientific Reports 9 (1), 7392, 2019
4 2019 Simulation of the programming efficiency and the energy consumption of Flash memories during endurance degradation J Postel-Pellerin, P Chiquet, V Della Marca
2016 International Semiconductor Conference (CAS), 101-104, 2016
4 2016 NVM cell degradation induced by femtosecond laser backside irradiation for reliability tests V Della Marca, M Chambonneau, S Souiki-Figuigui, J Postel-Pellerin, ...
2016 IEEE International Reliability Physics Symposium (IRPS), 7B-4-1-7B-4-7, 2016
4 2016 Physical understanding of program injection and consumption in ultra-scaled SiN Split-Gate memories L Masoero, G Molas, V Della Marca, M Gély, O Cueto, JP Colonna, ...
2012 4th IEEE International Memory Workshop, 1-4, 2012
4 2012 
Jérémy Postel-PellerinAix-Marseille Univ, Université de Toulon, CNRS, UM2NPBestätigte E-Mail-Adresse bei im2np.fr