| A million spiking-neuron integrated circuit with a scalable communication network and interface PA Merolla, JV Arthur, R Alvarez-Icaza, AS Cassidy, J Sawada, ... Science 345 (6197), 668-673, 2014 | 4247 | 2014 |
| Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores A. S. Cassidy, P. Merolla, J. V. Arthur, S. Esser, B. Jackson, R. Alvarez ... International Joint Conference on Neural Networks (IJCNN), 2013 | 1877* | 2013 |
| Truenorth: Design and tool flow of a 65 mw 1 million neuron programmable neurosynaptic chip F Akopyan, J Sawada, A Cassidy, R Alvarez-Icaza, J Arthur, P Merolla, ... IEEE transactions on computer-aided design of integrated circuits and …, 2015 | 1797 | 2015 |
| Neurogrid: A mixed-analog-digital multichip system for large-scale neural simulations BV Benjamin, P Gao, E McQuinn, S Choudhary, AR Chandrasekaran, ... Proceedings of the IEEE 102 (5), 699-716, 2014 | 1487 | 2014 |
| A million spiking-neuron integrated circuit with a scalable communication network and interface AM Paul, JV Arthur, R Alvarez-Icaza, AS Cassidy, J Sawada, F Akopyan, ... Science 345 (6197), 668-673, 2014 | 404 | 2014 |
| Cognitive computing programming paradigm: a corelet language for composing networks of neurosynaptic cores A Amir, P Datta, WP Risk, AS Cassidy, JA Kusnitz, SK Esser, ... The 2013 International Joint Conference on Neural Networks (IJCNN), 1-10, 2013 | 212 | 2013 |
| Cognitive computing systems: Algorithms and applications for networks of neurosynaptic cores SK Esser, A Andreopoulos, R Appuswamy, P Datta, D Barch, A Amir, ... The 2013 International Joint Conference on Neural Networks (IJCNN), 1-10, 2013 | 203 | 2013 |
| Building block of a programmable neuromorphic substrate: A digital neurosynaptic core JV Arthur, PA Merolla, F Akopyan, R Alvarez, A Cassidy, S Chandra, ... the 2012 international joint conference on Neural networks (IJCNN), 1-8, 2012 | 196 | 2012 |
| The 2013 international joint conference on neural networks (IJCNN) AS Cassidy, P Merolla, JV Arthur, SK Esser, B Jackson, R Alvarez-Icaza The 2013 International Joint Conference on Neural Networks (IJCNN), 2013 | 129 | 2013 |
| Truenorth ecosystem for brain-inspired computing: scalable systems, software, and applications J Sawada, F Akopyan, AS Cassidy, B Taba, MV Debole, P Datta, ... SC'16: Proceedings of the International Conference for High Performance …, 2016 | 108 | 2016 |
| Real-time scalable cortical computing at 46 giga-synaptic OPS/watt with~ 100× speedup in time-to-solution and~ 100,000× reduction in energy-to-solution AS Cassidy, R Alvarez-Icaza, F Akopyan, J Sawada, JV Arthur, ... SC'14: Proceedings of the International Conference for High Performance …, 2014 | 103 | 2014 |
| Spiking optical flow for event-based sensors using ibm's truenorth neurosynaptic system G Haessig, A Cassidy, R Alvarez, R Benosman, G Orchard IEEE transactions on biomedical circuits and systems 12 (4), 860-870, 2018 | 100 | 2018 |
| A multicast tree router for multichip neuromorphic systems P Merolla, J Arthur, R Alvarez, JM Bussat, K Boahen IEEE Transactions on Circuits and Systems I: Regular Papers 61 (3), 820-833, 2013 | 92 | 2013 |
| Multiplexing physical neurons to optimize power and area RAI Rivera, JV Arthur, AS Cassidy, PA Merolla, DS Modha US Patent 9,159,020, 2015 | 55 | 2015 |
| Consolidating multiple neurosynaptic cores into one memory RAI Rivera, JV Arthur, AS Cassidy, PA Merolla, DS Modha US Patent 8,990,130, 2015 | 51 | 2015 |
| Dielectric elastomer fiber transducers RAI Rivera, JMA Sanches, KC Galloway, HS Katzenberg, R Kothari, ... US Patent 7,834,527, 2010 | 49 | 2010 |
| Scaling multi-core neurosynaptic networks across chip boundaries RAI Rivera, JV Arthur, AS Cassidy, BL Jackson, PA Merolla, DS Modha, ... US Patent 9,924,490, 2018 | 41 | 2018 |
| Consolidating multiple neurosynaptic core circuits into one reconfigurable memory block maintaining neuronal information for the core circuits FA Akopyan, RAI Rivera, JV Arthur, AS Cassidy, BL Jackson, PA Merolla, ... US Patent 9,852,006, 2017 | 41 | 2017 |
| Globally asynchronous and locally synchronous (GALS) neuromorphic network RAI Rivera, JV Arthur, AS Cassidy, PA Merolla, DS Modha US Patent 9,563,841, 2017 | 38 | 2017 |
| Faulty core recovery mechanisms for a three-dimensional network on a processor array RAI Rivera, JV Arthur, JE Barth Jr, AS Cassidy, S Iyer, PA Merolla, ... US Patent 9,160,617, 2015 | 35 | 2015 |
John ArthurIBM research, Stanford University, University of PennsylvaniaCorreu electrònic verificat a us.ibm.com
