متابعة
Steven Derrien
Steven Derrien
Université de Rennes 1
بريد إلكتروني تم التحقق منه على irisa.fr
عنوان
عدد مرات الاقتباسات
عدد مرات الاقتباسات
السنة
High-level synthesis: from algorithm to digital circuit‏
P Coussy, A Morawiec‏
Springer, 2008‏
628*2008
On model subtyping‏
C Guy, B Combemale, S Derrien, JRH Steel, JM Jézéquel‏
Modelling Foundations and Applications: 8th European Conference, ECMFA 2012 …, 2012‏
852012
Approximating a single viewpoint in panoramic imaging devices‏
S Derrien, K Konolige‏
Proceedings 2000 ICRA. Millennium Conference. IEEE International Conference …, 2000‏
802000
Tightening contention delays while scheduling parallel applications on multi-core architectures‏
B Rouxel, S Derrien, I Puaut‏
ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-20, 2017‏
702017
ompVerify: polyhedral analysis for the OpenMP programmer‏
V Basupalli, T Yuki, S Rajopadhye, A Morvan, S Derrien, P Quinton, ...‏
OpenMP in the Petascale Era: 7th International Workshop on OpenMP, IWOMP …, 2011‏
702011
Runtime dependency analysis for loop pipelining in high-level synthesis‏
M Alle, A Morvan, S Derrien‏
Proceedings of the 50th Annual Design Automation Conference, 1-10, 2013‏
642013
Polyhedral bubble insertion: A method to improve nested loop pipelining for high-level synthesis‏
A Morvan, S Derrien, P Quinton‏
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013‏
582013
Hiding communication delays in contention-free execution for spm-based multi-core architectures‏
B Rouxel, S Skalistis, S Derrien, I Puaut‏
ECRTS 2019-31st Euromicro Conference on Real-Time Systems, 1-24, 2019‏
512019
A complete design-flow for the generation of ultra low-power WSN node architectures based on micro-tasking‏
MA Pasha, S Derrien, O Sentieys‏
Proceedings of the 47th Design Automation Conference, 693-698, 2010‏
442010
Parallelizing HMMER for hardware acceleration on FPGAs‏
S Derrien, P Quinton‏
2007 IEEE International Conf. on Application-specific Systems, Architectures …, 2007‏
412007
HLS tools for FPGA: Faster development with better performance‏
A Cornu, S Derrien, D Lavenier‏
Reconfigurable Computing: Architectures, Tools and Applications: 7th …, 2011‏
392011
GeCoS: A framework for prototyping custom hardware design flows‏
A Floc'h, T Yuki, A El-Moussawi, A Morvan, K Martin, M Naullet, M Alle, ...‏
2013 IEEE 13th International Working Conference on Source Code Analysis and …, 2013‏
372013
Combined instruction and loop parallelism in array synthesis for FPGAs‏
S Derrien, S Rajopadhye, SS Kolay‏
Proceedings of the 14th international symposium on Systems Synthesis, 165-170, 2001‏
36*2001
Safe overclocking for CNN accelerators through algorithm-level error detection‏
T Marty, T Yuki, S Derrien‏
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020‏
332020
Loop tiling for reconfigurable accelerators‏
S Derrien, S Rajopadhye‏
International Conference on Field Programmable Logic and Applications, 398-408, 2001‏
322001
A Reconfigurable Parallel Disk System for Filtering Genomic Banks.‏
D Lavenier, S Guyetant, S Derrien, S Rubini‏
Engineering of Reconfigurable Systems and Algorithms 2, 154-166, 2003‏
312003
Hardware acceleration of HMMER on FPGAs‏
S Derrien, P Quinton‏
Journal of Signal Processing Systems 58, 53-67, 2010‏
262010
Toward ultra low-power hardware specialization of a wireless sensor network node‏
MA Pasha, S Derrien, O Sentieys‏
2009 IEEE 13th International Multitopic Conference, 1-6, 2009‏
262009
Compiling Scilab to high performance embedded multicore systems‏
T Stripf, O Oey, T Bruckschloegl, J Becker, G Rauwerda, K Sunesen, ...‏
Microprocessors and Microsystems 37 (8), 1033-1049, 2013‏
252013
Acceleration of a content-based image-retrieval application on the RDISK cluster‏
A Noumsi, S Derrien, P Quinton‏
Proceedings 20th IEEE International Parallel & Distributed Processing …, 2006‏
252006
يتعذر على النظام إجراء العملية في الوقت الحالي. عاود المحاولة لاحقًا.
مقالات 1–20