| Graph representation learning for gate arrival time prediction P Shrestha, S Phatharodom, I Savidis Proceedings of the 2022 ACM/IEEE Workshop on Machine Learning for CAD, 127-133, 2022 | 12 | 2022 |
| EDA-schema: A graph datamodel schema and open dataset for digital design automation P Shrestha, A Aversa, S Phatharodom, I Savidis Proceedings of the Great Lakes Symposium on VLSI 2024, 69-77, 2024 | 5 | 2024 |
| Graph representation learning for parasitic impedance prediction of the interconnect P Shrestha, I Savidis 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023 | 5 | 2023 |
| EDA-ML: Graph representation learning framework for digital IC design automation P Shrestha, I Savidis 2024 25th International Symposium on Quality Electronic Design (ISQED), 1-7, 2024 | 3 | 2024 |
| Synthesis of coupling capacitance based hidden state transitions for sequential logic locking P Shrestha, I Savidis 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 1734-1738, 2022 | 1 | 2022 |
| Transfer Learning of Arrival Time Prediction Models from a 65 nm to a 28 nm Process Node P Shrestha, I Savidis 2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS), 1-6, 2024 | | 2024 |
Ioannis SavidisAssociate Professor, Drexel Universityبريد إلكتروني تم التحقق منه على coe.drexel.edu