متابعة
Florent de Dinechin
Florent de Dinechin
professor, INSA-Lyon
بريد إلكتروني تم التحقق منه على insa-lyon.fr - الصفحة الرئيسية
عنوان
عدد مرات الاقتباسات
عدد مرات الاقتباسات
السنة
Handbook of floating-point arithmetic‏
JM Muller, N Brunie, F De Dinechin, CP Jeannerod, M Joldes, V Lefèvre, ...‏
Birkhäuser, 2018‏
10232018
Designing custom arithmetic data paths with FloPoCo‏
F De Dinechin, B Pasca‏
IEEE Design & Test of Computers 28 (4), 18-27, 2011‏
4432011
Multipartite table methods‏
F De Dinechin, A Tisserand‏
IEEE Transactions on Computers 54 (3), 319-330, 2005‏
2452005
Large multipliers with fewer DSP blocks‏
F de Dinechin, B Pasca‏
2009 International Conference on Field Programmable Logic and Applications …, 2009‏
151*2009
Certifying the floating-point implementation of an elementary function using Gappa‏
F De Dinechin, C Lauter, G Melquiond‏
IEEE Transactions on Computers 60 (2), 242-253, 2010‏
1502010
Posits: the good, the bad and the ugly‏
F De Dinechin, L Forget, JM Muller, Y Uguen‏
Proceedings of the Conference for Next Generation Arithmetic 2019, 1-10, 2019‏
1292019
Table-based polynomials for fast hardware function evaluation‏
J Detrey, F De Dinechin‏
2005 IEEE International Conference on Application-Specific Systems …, 2005‏
1192005
An FPGA-specific approach to floating-point accumulation and sum-of-products‏
F De Dinechin, B Pasca, O Cret, R Tudoran‏
2008 International Conference on Field-Programmable Technology, 33-40, 2008‏
1162008
Assisted verification of elementary functions using Gappa‏
F De Dinechin, CQ Lauter, G Melquiond‏
Proceedings of the 2006 ACM symposium on Applied computing, 1318-1322, 2006‏
1052006
Some improvements on multipartite table methods‏
F de Dinechin, A Tisserand‏
Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, 128-135, 2001‏
992001
Multipliers for floating-point double precision and beyond on FPGAs‏
S Banescu, F De Dinechin, B Pasca, R Tudoran‏
ACM SIGARCH Computer Architecture News 38 (4), 73-79, 2011‏
942011
Parameterized floating-point logarithm and exponential functions for FPGAs‏
J Detrey, F de Dinechin‏
Microprocessors and Microsystems 31 (8), 537-545, 2007‏
902007
Generating high-performance custom floating-point pipelines‏
F De Dinechin, C Klein, B Pasca‏
2009 International Conference on Field Programmable Logic and Applications …, 2009‏
822009
Evaluating the hardware cost of the posit number system‏
Y Uguen, L Forget, F De Dinechin‏
2019 29th International Conference on Field Programmable Logic and …, 2019‏
782019
When FPGAs are better at floating-point than microprocessors‏
F De Dinechin, J Detrey, O Creţ, R Tudoran‏
692007
CR-LIBM A library of correctly rounded elementary functions in double-precision‏
C Daramy-Loirat, D Defour, F De Dinechin, M Gallet, N Gast, C Lauter, ...‏
LIP,, 2006‏
682006
Automatic generation of polynomial-based hardware architectures for function evaluation‏
F De Dinechin, M Joldes, B Pasca‏
ASAP 2010-21st IEEE International Conference on Application-specific Systems …, 2010‏
662010
A VHDL library of LNS operators‏
J Detrey, F de Dinechin‏
The Thrity-Seventh Asilomar Conference on Signals, Systems & Computers, 2003 …, 2003‏
662003
A tool for unbiased comparison between logarithmic and floating-point arithmetic‏
J Detrey, F De Dinechin‏
The Journal of VLSI Signal Processing Systems for Signal, Image, and Video …, 2007‏
642007
Return of the hardware floating-point elementary function‏
J Detrey, F De Dinechin, X Pujol‏
18th IEEE Symposium on Computer Arithmetic (ARITH'07), 161-168, 2007‏
642007
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مقالات 1–20