متابعة
Noriyuki Miura
Noriyuki Miura
Osaka University
بريد إلكتروني تم التحقق منه على ist.osaka-u.ac.jp - الصفحة الرئيسية
عنوان
عدد مرات الاقتباسات
عدد مرات الاقتباسات
السنة
A scalable 3D heterogeneous multi-core processor with inductive-coupling ThruChip interface‏
N Miura, Y Koizumi, E Sasaki, Y Take, H Matsutani, T Kuroda, H Amano, ...‏
Cool Chips XVI (COOL Chips), 2013 IEEE, 1-3, 2013‏
2042013
Analysis and design of inductive coupling and transceiver circuit for inductive inter-chip wireless superconnect‏
N Miura, D Mizoguchi, T Sakurai, T Kuroda‏
IEEE Journal of Solid-State Circuits 40 (4), 829-837, 2005‏
1782005
A 1.2 Gb/s/pin wireless superconnect based on inductive inter-chip signaling (IIS)‏
D Mizoguchi, YB Yusof, N Miura, T Sakura, T Kuroda‏
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004‏
1442004
A 0.14 pJ/b inductive-coupling inter-chip data transceiver with digitally-controlled precise pulse shaping‏
N Miura, H Ishikuro, T Sakurai, T Kuroda‏
2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007‏
1372007
A 1Tb/s 3W inductive-coupling transceiver for inter-chip clock and data link‏
N Miura, D Mizoguchi, M Inoue, K Niitsu, Y Nakagawa, M Tago, ...‏
2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006‏
1372006
An 11Gb/s inductive-coupling link with burst transmission‏
N Miura, Y Kohama, Y Sugimori, H Ishikuro, T Sakurai, T Kuroda‏
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008‏
992008
A 195-Gb/s 1.2-W inductive inter-chip wireless superconnect with transmit power control scheme for 3-D-stacked system in a package‏
N Miura, D Mizoguchi, M Inoue, T Sakurai, T Kuroda‏
IEEE Journal of Solid-State Circuits 41 (1), 23-34, 2005‏
992005
A 1 Tb/s 3 W inductive-coupling transceiver for 3D-stacked inter-chip clock and data link‏
N Miura, D Mizoguchi, M Inoue, K Niitsu, Y Nakagawa, M Tago, ...‏
IEEE Journal of Solid-State Circuits 42 (1), 111-122, 2006‏
842006
A high-speed inductive-coupling link with burst transmission‏
N Miura, Y Kohama, Y Sugimori, H Ishikuro, T Sakurai, T Kuroda‏
IEEE Journal of Solid-State Circuits 44 (3), 947-955, 2009‏
822009
A 195Gb/s 1.2 W 3D-stacked inductive inter-chip wireless superconnect with transmit power control scheme‏
N Miura, D Mizoguchi, M Inoue, H Tsuji, T Sakurai, T Kuroda‏
ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State …, 2005‏
792005
Em attack is non-invasive?-design methodology and validity verification of em attack sensor‏
N Homma, Y Hayashi, N Miura, D Fujimoto, D Tanaka, M Nagata, T Aoki‏
Cryptographic Hardware and Embedded Systems–CHES 2014: 16th International …, 2014‏
712014
Electronic circuit‏
T Kuroda, D Mizoguchi, YB Yusof, N Miura, T Sakurai‏
US Patent 7,768,790, 2010‏
652010
Ultraviolet sensor and method of manufacturing ultraviolet sensor‏
N Miura‏
US Patent App. 12/343,907, 2009‏
632009
Pll to the rescue: a novel em fault countermeasure‏
N Miura, Z Najm, W He, S Bhasin, XT Ngo, M Nagata, JL Danger‏
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016‏
582016
6W/25mm2 inductive power transfer for non-contact wafer-level testing‏
A Radecki, H Chung, Y Yoshida, N Miura, T Shidei, H Ishikuro, T Kuroda‏
2011 IEEE International Solid-State Circuits Conference, 230-232, 2011‏
572011
A scalable 3D heterogeneous multicore with an inductive ThruChip interface‏
N Miura, Y Koizumi, Y Take, H Matsutani, T Kuroda, H Amano, ...‏
IEEE Micro 33 (6), 6-15, 2013‏
542013
An 8tb/s 1pj/b 0.8mm2/tb/s qdr inductive-coupling interface between 65nm cmos gpu and 0.1μm dram‏
N Miura, K Kasuga, M Saito, T Kuroda‏
2010 IEEE International Solid-State Circuits Conference-(ISSCC), 436-437, 2010‏
542010
Cross talk countermeasures in inductive inter-chip wireless superconnect‏
N Miura, D Mizoguchi, T Sakurai, T Kuroda‏
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference (IEEE Cat …, 2004‏
532004
A local EM-analysis attack resistant cryptographic engine with fully-digital oscillator-based tamper-access sensor‏
N Miura, D Fujimoto, D Tanaka, Y Hayashi, N Homma, T Aoki, M Nagata‏
2014 symposium on VLSI circuits digest of technical papers, 1-2, 2014‏
482014
Physical attack protection techniques for IC chip level hardware security‏
M Nagata, T Miki, N Miura‏
IEEE transactions on very large scale integration (VLSI) systems 30 (1), 5-14, 2021‏
472021
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مقالات 1–20